賀 向國瑜同學 榮獲 2024 TSIA半導體獎!!!

賀 李敏鴻教授 榮獲112年度國科會傑出研究獎-微電子工程!!!

賀 李敏鴻教授 與臺灣師範大學物理系藍彥文教授與陸亭樺教授、陽明交通大學電子物理系林俊良副教授、成功大學物理學系陳宜君教授所組成聯合研究團隊，開發出基於二維材料二硫化鉬的創新鐵電電晶體(ST-3R MoS2 FeS-FET)，並成功發表於國際知名學術期刊《自然電子》(Nature Electronics)!!! 

https://www.nstc.gov.tw/folksonomy/detail/65d42fe2-5acc-4f8e-a246-6ea95be1f98d?l=CH&utm_source=rss

https://www.ntdtv.com.tw/b5/20240221/video/384586.html

賀 向國瑜同學 獲 TSMC Pathfinding 33T Offer

賀  Symposium on VLSI Technology and Circuits  2023論文接受

1.  J.-Y. Lee, F.-S. Chang, K.-Y. Hsiang, P.-H. Chen, Z.-F. Luo, Z.-X. Li, J.-H. Tsai, C. W. Liu, and M. H. Lee*, “3D Stackable Vertical Ferroelectric Tunneling Junction (V-FTJ) with on/off Ratio 1500x, Applicable Cell Current, Self-Rectifying Ratio 1000x, Robust Endurance of 109 Cycles, Multilevel and Demonstrated Macro Operation Toward High-Density BEOL NVMs, ” accepted by Symposium on VLSI Technology and Circuits, Kyoto, Japan, 11-16, June, 2023.

2.  K.-Y. Hsiang, J.-Y. Lee, F.-S. Chang, Z.-F. Lou, Z.-X. Li, Z.-H. Li, J.-H. Chen, C. W. Liu, T.-H. Hou, and M. H. Lee*, “FeRAM Recovery up to 200 Periods with Accumulated Endurance 1012 Cycles and an Applicable Array Circuit toward Unlimited eNVM Operations, ” accepted by Symposium on VLSI Technology and Circuits, Kyoto, Japan, 11-16, June, 2023.

3.  Yu-Rui Chen, Yi-Chun Liu, Zefu Zhao, Wan-Hsuan Hsieh, Jia-Yang Lee, Chien-Te Tu, Bo-Wei Huang, Jer-Fu Wang, Shee-Jier Chueh, Yifan Xing, Guan-Hua Chen, Hung-Chun Chou, Dong Soo Woo, M. H. Lee, and C. W. Liu*, “First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 Cycles, ” accepted by Symposium on VLSI Technology and Circuits, Kyoto, Japan, 11-16, June, 2023.

賀 向國瑜同學 入選 Top Ranked Student Paper of IEDM 2022，

獲邀稿推薦IEEE Special Issue

•賀 International Electron Device Meeting (IEDM) 2022論文接受

(兩篇為本實驗室主發，一篇與陽交大共同發表)

1.  K.-Y. Hsiang, Y.-C. Chen, F.-S. Chang, C.-Y. Lin, C.-Y. Liao, Z.-F. Lou, J.-Y. Lee, W.-C. Ray, Z.-X. Li, C.-C. Wang, H.-C. Tseng, P.-H. Chen, J.-H. Tsai, M. H. Liao, T.-H. Hou, C. W. Liu, P.-T. Huang, P. Su, and M. H. Lee*, “Novel Opposite Polarity Cycling Recovery (OPCR) of HfZrO2 Antiferroelectric-RAM with an Access Scheme Toward Unlimited Endurance, ” Technical Digest, International Electron Device Meeting (IEDM), pp. 763-766, San Francisco, Dec. 3-7, 2022.

2.  C.-Y. Liao, Z.-F. Lou, C.-Y. Lin, A. Senapati, R. Karmakar, K.-Y. Hsiang, Z.-X. Li, W.-C. Ray, J.-Y. Lee, P.-H. Chen, F.-S. Chang, H.-H. Tseng, C.-C. Wang, J.-H. Tsai, Y.-T. Tang, S. T. Chang, C. W. Liu, S. Maikap*, and M. H. Lee*, “Superlattice HfO2-ZrO2 based Ferro-Stack HfZrO2 FeFETs: Homogeneous-Domain Merits Ultra-Low Error, Low Programming Voltage 4 V and Robust Endurance 109 cycles for Multibit NVM, ” Technical Digest, International Electron Device Meeting (IEDM), pp. 878-881, San Francisco, Dec. 3-7, 2022.

3.  Yu-Chen Chen*, Kuo-Yu Hsiang, Min-Hung Lee, and Pin Su*, “Monte-Carlo Modeling and Characterization of Switching Dynamics for Antiferroelectric/Ferroelectric HZO considering Mechanisms of Fatigue, ” Technical Digest, International Electron Device Meeting (IEDM), pp. 310-313, San Francisco, Dec. 3-7, 2022.

賀  Symposium on VLSI Technology and Circuits  2022論文發表

1.  C.-Y. Liao, K.-Y. Hsiang, Z.-F. Lou, H.-C. Tseng, C.-Y. Lin, Z.-X. Li, F.-C. Hsieh, C.-C. Wang, F.-S. Chang, W.-C. Ray, Y.-Y. Tseng, S. T. Chang, T.-C. Chen, and M. H. Lee*, “Endurance > 1011 Cycling of 3D GAA Nanosheet Ferroelectric FET with Stacked HfZrO2 to Homogenize Corner Field Toward Mitigate Dead Zone for High-Density eNVM, ” Symposium on VLSI Technology and Circuits, pp. 393-394, Honolulu, Hawaii, 12-17, June, 2022.

2.  H.-L. Chiang, J.-F. Wang, K.-H. Lin, C.-H. Nien, J.-J. Wu, K.-Y. Hsiang, C.-P. Chuu, Y.-W. Chen, X.W. Zhang, C. W. Liu, Tahui Wang, C.-C. Wang, M.-H. Lee, M.-F. Chang, C.-S. Chang, T.C. Chen*, “Interfacial-Layer Design for Hf1-xZrxO2-Based FTJ Devices: From Atom to Array, ” Symposium on VLSI Technology and Circuits, pp. 361-362, Honolulu, Hawaii, 12-17, June, 2022.

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