Micron NAND CMOS Summit in India!
An incredible platform where leaders, innovators, and technologists came together to share ideas, collaborate, and shape the future of NAND design and CMOS integration.
Micron NAND DET in India!
Member of the NAND Design Enablement (DET) organization, supporting design rule, test structure, and enablement activities.
Micron Memory Run – AI for all
TD MOI - our team with NAND Design rule, DET (design enablement) & Mask Generator with our director Usha, NAND DET & Devices
TD MOI - our team with NAND Design rule, DET (design enablement) & Mask Generator with our director Usha, NAND DET & Devices
NMDC Hyderabad Marathon 2025
TD MOI - our team with NAND Design rule, DET (design enablement) & Mask Generator with our director Usha, NAND DET & Devices
Receiving reward from Todd, Sr. Manager for contribution to Innovation Pillar of Micron India - Technology Development department - 3rd June 2025
Culture Champion Recognition Received from Linda, CVP on 5th December 2024
Recognition received from our CEO for our group work on advanced NAND Qualification - 09/09/2024
With Micron-Singapore NTI team
#Go-Micron our Micron-India team with Director Suren
At Merlion Park: The "Water Lion" in Singapore
With Prof. Hori-sensei, Prof. Kobayashi-sensei, Prof. Tsutsumi-sensei and Airah-san
At Nagoya University
At beautiful NUS campus, where I spent from 2009 to 2013 during PhD degree
During my talk at icmat2019 singapore on multilevel memory device
During device fabrication at the Sengen site, NIMS in a clean room environment under NIMS Nanofabrication Platform, which is an open facility with advanced nanofabrication processing systems.
With Prof. Sow in Tsukuba, Japan March 2019
Topic: 2D van-der-Waals Heterostructures Based Photodiode, Phototransistor and Non-Volatile Memory Devices for IoT Era
My family during Hiroshima visit in 2021.
My son Reyaan in Nobel Prize Memorial Exhibition Hall at Nagoya University.