Research Works

LEAKI-PLC: Live End-to-End AES Key Recovery from Industrial PLCs via Electromagnetic Side-Channel Analysis

In this collaborative research, we developed an electromagnetic side-channel analysis workflow that recovers an AES-128 encryption key from an Arduino Opta industrial programmable logic controller. The workflow combines electromagnetic leakage localization, trace acquisition, profiled template analysis, and key verification. The experiments demonstrate key recovery from a commercial controller without power-rail measurement access or external clock control, highlighting the importance of physical security evaluation for industrial embedded systems.

Dyn-A-Map: Dynamic AI-Model Mapping for Robust and Accurate MRAM-Based Analog Edge Computing

In this research, we developed Dyn-A-Map framework, a post-training weight-mapping framework for improving the reliability of MRAM-based analog in-memory computing. Manufacturing variations can change memory-device resistance and introduce faults that reduce neural-network inference accuracy. Dyn-A-Map identifies vulnerable memory regions and guides the mapping of neural-network weights to more reliable regions without model retraining. Circuit-level simulations using IMAC-Sim demonstrate accuracy recovery under the evaluated process-induced fault conditions.

ARMOR-IMC: Adaptive Resource Mapping for Operational Robustness via Secure In-Memory Computing

In this research, we investigated how input-dependent power consumption can expose information about AI computations in spintronic MRAM-based in-memory computing. ARMOR-IMC evaluates this leakage and introduces stochastic noise injection to make power signatures less predictable. Using circuit-level simulations, we examined the reduction of input-dependent power information alongside inference accuracy and power overhead. This work contributes to protecting AI hardware against power side-channel threats.

S-Tune: SOT-MTJ Manufacturing Parameters Tuning for Securing the Next Generation of Computing

In this research, we investigated how slight modifications in manufacturing parameters, specifically the oxide thickness (Tox), of Spin-Orbit Torque Magnetic Tunnel Junctions (SOT-MTJs) can introduce security vulnerabilities in machine learning accelerators. By altering the Tox layer, adversaries can cause targeted bit-flips in the crossbar arrays used in ML models, leading to significant recognition errors, particularly in the MNIST dataset. The study proposes potential mitigation strategies to address these novel hardware security threats posed during the semiconductor manufacturing process, ensuring secure and reliable ML computations.

Figure 1. Device Structure of an SOT-MTJ Cell.

Figure 2. Simplified Overview of IC Supply Chain Process and Security Threats Associated with the Process.

Figure 3. Approach to examine sensitivity against various threats.

Figure 4. Simulation Framework and Process flow.

Optimized and Automated Secure IC Design Flow: A Defense-in-Depth Approach

In this collaborative research with UC Davis, we developed an Optimized and Automated Secure IC (OASIC) design flow to enhance security in IC design using a defense-in-depth strategy. The work focuses on protecting hardware IP through dynamic obfuscation using MRAM-based look-up tables (LUTs) and switch boxes. This approach ensures resilience against SAT-based attacks and power side-channel attacks while minimizing power and area overhead. The study demonstrates the scalability of this method, showing that the OASIC design flow can achieve maximum security with less than 15% area overhead in comparison to the original design, making it highly efficient for secure semiconductor production.

Undergraduate Research Experience

Worked as a RA under the supervision of Associate Professor Dr. Mohammad Sahadet Hossain on Control Theory. It was a year-long research work and funded by North South University. We worked on Model Order Reduction (MOR) of periodic systems using the Krylov subspace methods. Specifically, we worked on the model reduction for linear discrete-time periodic (LDTP) control system. So far we have published one Journal paper and one Conference paper.

EXOARM: A Powered Exoskeleton for human arm

It was my final year project. Under the supervision of Dr Shahnewaz Siddique I along with my team build an arm exoskeleton. it aims to provide a performance-enhancing solution for physically disabled people to aid in their daily chores, particularly in lifting heavy objects for a longer period of time. The proposed system uses Commercial Off The Shelf (COTS) components such as Arduino, Myo-ware Muscle Sensor and Linear Actuator. The aim of this paper is to present the design and fabrication of a lightweight, controllable, reliable, wearable and low-cost exoskeleton for the human arm.

Page updated

Google Sites

Report abuse