Semiconductor chip design and fabrication is a billion dollar industry in the present century. Due to the access of designs by untrusted third parties in different stages of current integrated circuit (IC) supply chain model, these designs are vulnerable to a number of attacks which cause revenue loss as well as loss of fame for the design houses. To prevent these attacks, researchers are working on implementation of robust methodologies that will prevent the direct access of the designs which will potentially preserve the designs and royalties from being affected. These methodologies are commonly known as hardware obfuscation methods. Md Moshiur Rahman is currently doing his research in this highly demanding field of hardware security as a Research Assistant in Warren B. Nelms Institute for the Connected World at University of Florida which is led by Prof. Swarup Bhunia. Earlier, Moshiur had affiliation with Florida Institute for Cyber Security (FICS) Research of University of Florida.
Research Focus
Sequential design obfuscation
Combinational design obfuscation
Gate-level design obfuscation
State space obfuscation
Programmable ASIC
CAD tool development
Hardware Trojan detection
Research Projects
State-space obfuscation and logic locking against reverse engineering the gate-level netlist.
Demonstration of hardware obfuscation implementation, integration, and simulation in SoC design.
Timed unlocking of logic locked chip to facilitate testing in untrusted testing facility.
Remote decommissioning of micro-electronic systems.
CAD tool for automated state-space obfuscation.
CAD tool for hardware Trojan resiliency using obfuscation.
JTAG based chip I/O locking to prevent SAT, KSA, and other attacks on hardware obfuscation.
FSM obfuscation in register-transfer-level (RTL).
Implementation of FSM obfuscation in structured ASIC.
Hardware IP protection through logic redaction (removal and replacement).