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Research & Technology Readiness :
Research & Technology Readiness :
Developing compact models for emerging devices and materials to enable extreme-environment electronics, accelerating design technology co-optimization (DTCO) through ML/AI-based solutions, and integrating process flows into scalable process design kits (PDKs).
Integrating Wideband Gap CMOS Process with AI-Enabled EDA Tools
Integrating Wideband Gap CMOS Process with AI-Enabled EDA Tools
Integrating wide-bandgap CMOS processes with AI-enabled EDA is essential for next-generation high-temperature electronics. Our research focuses on developing scalable wide-bandgap CMOS technologies, including process flow optimization, device design, CMOS-compatible process integration, compact modeling, and design rule development. We leverage machine learning and AI-driven automation to accelerate design technology co-optimization (DTCO), enabling faster technology development and efficient solutions for high-temperature computing systems. In addition, we explore SiC-based CMOS and AlScN-based memory technologies for robust, energy-efficient operation in extreme environments.
AlScN Based Ferroelectric Memory System in HighTemperature
AlScN Based Ferroelectric Memory System in HighTemperature
Aluminum scandium nitride (AlScN) stands out as a scalable ferroelectric material that combines robust polarization behavior with back-end-of-line (BEOL) process compatibility. Its compatibility with semiconductor fabrication processes has generated significant interest; however, comprehensive device models for AlScN-based capacitors are still lacking. Our group investigates the device behavior, capacitance–voltage (C–V) and current–voltage (I–V) characteristics, and develops SPICE compact models for AlScN-based devices to enable accurate circuit-level simulation
Developing Compact model for SiC Low Voltage MOSFET for SiC CMOS prcoess design kit
Peer-Reviewed Journal Publications
Peer-Reviewed Journal Publications
[1] A. S. M. K. Hasan, M. M. Hossain, M. Z. Islam, M. M. Islam, S. Ahmed, and H. A. Mantooth, “Temperature Scaling and C–V Modeling of SiC Low-Voltage MOSFETs for IC Design,” IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 13, no. 1, pp. 335–347, 2025, doi: 10.1109/JESTPE.2024.3482971.
[2] A. S. M. K. Hasan, M. M. Hossain, M. M. Islam, A. A. Jalal, M. D. Rahman, C. Shaw, et al., “Compact Modeling of $\beta$-Ga₂O₃ Lateral Depletion Mode MOSFET,” IEEE Electron Device Letters, 2025, doi: 10.1109/LED.2025.3639367.
Peer-Reviewed Conference Publications
Peer-Reviewed Conference Publications
[3] A. S. M. K. Hasan, M. D. Rahman, T. Akter, M. M. Islam, M. M. Hossain, X. Song, et al., “Compact Model of $\beta$-Ga₂O₃ Schottky Barrier Diode,” in Proceedings of the IEEE Applied Power Electronics Conference and Exposition (APEC), 2025, pp. 2407–2412, doi: 10.1109/APEC48143.2025.10977072.
[4] A. S. M. K. Hasan, M. M. Islam, and H. A. Mantooth, “Breakdown and C–V Characteristics Analysis of Depletion Mode Lateral $\beta$-Ga₂O₃ MOSFET,” in Proceedings of the International Compact Modeling Conference (ICMC), 2025, pp. 1–4.
[5] M. M. Islam, S. Singha, M. M. R. Adnan, and T. Dev, “Design and Characterization of Two Different Structures of Junctionless Nanowire Transistor Considering Quantum Ballistic Transport Model,” in Proceedings of the International Conference on Advancement in Electrical and Electronic Engineering (ICAEEE), 2018.
[6] M. M. Islam, M. F. Islam, and S. Singha, “Design and Implementation of Raspberry Pi Based Real-Time Industrial Energy Analyzer,” in Proceedings of the International Conference on Electrical, Computer and Communication Engineering (ECCE), 2019.
[7] M. M. Islam, A. S. M. K. Hasan, A. A. Jalal, and H. A. Mantooth, “Compact Model for a Ferroelectric Capacitor Compatible with Integrated Circuit Design in Harsh Environment,” in Proceedings of the International Compact Modeling Conference (ICMC), 2025, pp. 1–4.
[8] E. H. Minhaj, M. A. Razzak, M. M. Islam, and M. M. R. Adnan, “Performance Enhancement of Multigate FinFETs by Using High-k Stack Oxide,” in Proceedings of the International Conference on Advances in Science, Engineering and Robotics Technology (ICASERT), 2019.
[9] A. S. M. K. Hasan, M. D. Rahman, M. M. Islam, M. M. Hossain, and H. A. Mantooth, “DC Modeling of 8 kV Depletion Mode Gallium Oxide MOSFET,” in Proceedings of the IEEE Applied Power Electronics Conference and Exposition (APEC), 2026, pp. 1544–1549.
[10] A. S. M. K. Hasan, M. D. Rahman, M. M. Islam, M. M. Hossain, and H. A. Mantooth, “SEU Effect in E-Mode $\beta$-Ga₂O₃ MOSFET with Epitaxial Drift Layer at the Breakdown Region,” in Proceedings of the IEEE Workshop on Wide Bandgap Power Devices and Applications (WiPDA), 2025.
[11] A. Jalal, M. M. Islam, G. R. Fox, D. Drury, N. Moshirfatemi, B. Hanrahan, et al., “Parametric Analysis of an AlScN-Based Ferroelectric Capacitor Model in a Ferroelectric Memory Bitcell,” in Proceedings of the Non-Volatile Memory Technology Symposium (NVMTS), 2025, pp. 1–6.
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