Ashiq Muhammed: Variability Analysis of Nanosheet Transistor
Bandaru Saranya: Modeling and Simulation of GaN HEMT for Space Application
Javadala Harika: Ferroelectric FET towards Memory and Synaptic Applications
Utkarshha Bharat Shriram: Ferroelectric FET towards Memory and Synaptic Applications
Sathya N M: Modeling and Simulation of CFET for advanced technology nodes
Jalluri Sai Sasank: RTL Design flow of advanced transistor nodes
Kinage Om Ajit: Physical design of VLSI circuits
Patnala Bhargav: RTL Design flow of advanced transistor nodes
Anchal Chaudhary: Compact modeling of advanced devices
J Sai Sampath: FDSOI Single transistor for Neuromorphic computing with different encoding technique
Chinta Navadeep: FDSOI Single transistor for Neuromorphic computing with different encoding technique
M Vinay Kumar: RISC 5 processor design flow
Ph. D Scholar (Jan, 2021-July, 2025); Thesis Submitted: 01 August 2025
Thesis Title: MOSFET-Based Leaky Integrate-and-Fire Neurons for Reliable Spiking Neural Network- Modeling, Simulation and Characterization
Previous Position: SERB-OVDF @ Purdue University, USA (Aug 2023 - Aug 2024)
Current Position: Principal Eng Device Modeling & Characterization @ GlobalFoundries, Bangalore
Ph. D Scholar (July, 2019-August, 2023); Defended thesis: 19 December 2023
Thesis Title: Modeling of Ferroelectric and Negative Capacitance FDSOI Transistors for Switching, Memory and Neuromorphic Applications
Previous Position: Postdoctoral Scholar @ Penn State University, USA (Dec 2023 - Oct 2024)
Current Position: Senior Engineer @ GlobalFoundries, Malta, USA
Ph. D Scholar (July, 2018-July 2022); Defended thesis: 17 March 2023
Thesis Title: Numerical and Analytical Modeling of B or N Substitution Doped Single Layer Graphene FET: RF and Synaptic Applications
Previous Position: Associate @ UnitedLex ( July 2022 - Oct 2022)
Current Position: Principal Eng Design Enablmt Modeling @ GlobalFoundries, Bangalore
Srivatsan R (PG): FONOS FET for Memory and Synaptic Applications: Towards Reliability Study (Currently, Engineer @Qualcomm India Pvt Ltd)
Avinash Choudhary (UG): Fabrication and characterization of Fe-RAM (Pursuing direct Ph.D. @IIT Madras)
A. Saicharan (UG): Analysis and Simulation of Self-Heating Effects in 28 nm FDSOI MOSFET
Aravind A (UG): FDSOI-Based Neurons for Neuromorphic Computing: Analytical Modeling, Synapse Cointegration, and 22FDX Characterization (Joining Ph.D. @IIT Kanpur)
Mohith Sai B (UG): Boosting 4H-SiC Trench MOSFET Performance with Charge Sheet Super Junction (Joining Ph.D. @IIT Bhubaneswar)
N. Bhanuprakash (UG): Design and Development of Non-contact Multispectral Polarization-sensitive Transvaginal Dermascope
Bhavyatara (UG): A Benchmarking Investigation of ML, CNN, and SNN models for Optimization and Prediction of Performance Metrics of Multi-Stacked NSFETs
A S Surya Sai (UG): A Benchmarking Investigation of ML, CNN, and SNN models for Optimization and Prediction of Performance Metrics of Multi-Stacked NSFETs
Aparna Krishna Kumar (PG): Mimicking of Neuro-Synaptic Behaviour through 1T SOI without additional Circuitry for Spiking Neural Network (Currently, Engineer @AMD India Private Limited, Hyderabad)
Poovendran M (PG): High Endurance FeFET with Nitride as Interface Layer for Memory and Neuromorphic Application (Ph.D. @University of Bordeaux)
Nandhini M (PG): Exploring the possibilities of CFET towards logic and memory perspective (Currently, Engineer @Apex Semiconductor, Bangalore)
Mamidala Suraj Mithra (PG): A Machine Learning approach for optimising and accurate prediction of performance parameters for Complementary FET (Currently, Engineer @Microchip, Chennai)
Pranavram V (PG): Towards high performance field-effect transistors based on 2D materials: An experimental and modelling approach (Currently, Ph.D. @Penn State University, USA)
Manas Srivastava (PG): Developing Spiking Neural Networks for Pattern Recognition: Integrating STDP for Learning and Comparison with Non-Learning Architectures (Currently, Engineer @Tonboimaging, Bangalore)
Aswathy Manoj Kumar (PG): Effects of TID and Temperature on the Performance of Spiking Neural Network (Currently, Engineer @Apex Semiconductor, Bangalore)
Sujeet P (PG): Content-Addressable Memory of a Ferroelectric field effect transistor
Anshuman Bhasker (UG): Designing SRAM based In Memory Computing
Ankit Lodhi (UG): Designing SRAM based In-Memory Computing and Implementing a Arbitrary Boolean Function
B Raviteja (PG): Design and Verification of MIPI (Mobile Industry Processor Interface) M-PHY MRX Module (Currently, pursuing MS @Arizona State University, USA)
D Pavan (UG): Modeling and Simulation of GaAs Solar Cell using Silvaco TCAD
Nithin Sai (UG): Modeling and Simulation of GaAs Solar Cell using Silvaco TCAD
Hitendra Singh Narwaria (PG): Solar Power Forecasting using Artificial Neural Network (Currently, Engineer @Mahindra & Mahindra Limited, Chennai)
Shibi Varku (DD): An approach to high efficiency solar cell using CFTS/CFTSe multiple quantum well and superlattice structure (Currently, pursuing Ph.D., @NTU Singapore)
Ametha Sri Sai Dhruthi (DD): An Approach to Design Energy Efficient LIF Neuron for SNN Application (Currently, Silicon Design Engineer - 2 @AMD India Private Limited, Bangalore)
V Rama Seshu (DD): Modelling and Simulation of NCFETs with a target to overcome the Boltzmann’s Tyranny (Currently, Engineer @Microchip Technology, Hyderabad)
Malli Chenchu Kiran (UG): Designing of Energy Efficient MAC Unit Using In-Memory Computing (Currently, Application Engineer @Synopsys, Hyderabad)
Lokesh Jonnadula (UG): Designing of Energy Efficient MAC Unit Using In-Memory Computing (Currently, M.Tech @IIT Tirupati)
Marikanti Aravind (UG): Analysis of Carrier Transport and Loss Mechanism in CFTSe Thin Film Absorber Layer for PV Applications
Sowparna P (PG) : Modeling of energy efficient LIF neuron for neuromorphic computing
M Siddharth (PG) : Modeling of doped Graphene FET to support ballistic transport
Monika Shree K (DD) : Non-noble metals based Nanophotonics (Currently, Engineer @NXP Semiconductors)
Jayadeep Reddy (DD) : Dual-Band Photo-Detection (Currently, Engineer @NXP Semiconductors)
Adari Nikhila Pranavi (DD) : Towards the development for unified models for memristor (Currently, Engineer @NXP Semiconductors)
Bhargav N C (DD) : Modelling of Temperature Variation Effect on the Memristance (Currently, Engineer @GlobalFoundries)
Tadigadapa Karthik (UG) : Design and Analysis of Thin Film Kesterite Solar Cell for Future PV Technology
Pintu Kumar (PG) : Proposal To Reduce Floating Body Effect In SOI-MOSFET
Vikash Singh (PG) : Study on Junctionless Field Effect Transistor using 4H-Sic Material (Currently, pursuing Ph.D. @IIT Mandi)
R Priyanka (DD) : Investigation of Label Free DNA Detection Techniques using Dielectric-Modeulated FET
L Sravani (DD) : Development of thin film Quantum well kesterite Solar cell for enhancement of Efficiency (Currently, Engineer @Intel, Bangalore)
M Dinesh (DD) : Simulation of Doped Top Gated Graphene FET
Sakshi Vastrad (DD) : Sensitivity Evaluation of SiGe PNPN TFET Biosensors for Label Free Detection (Completed MS @Texas A&M)
Akhil Sariki (UG) : Is Accumulation or Inversion Mode Dielectric Modulated FET Better for Label-Free Biosensing?: A Comparative Investigation (Currently, Engineer @Synopsys, Hyderabad)
K.Venkata Rao (UG) : Dielectric modulated FET architecture for Biosensing application
Rameez Raja Shaik (PG) : Electrically Modified FD-SOI for Better Performance (Currently, Senior Engineer @GlobalFoundries, Malta, USA), Received Silver Medal for best project in convocation-2019
Arun G (PG) : High Efficiency Quantum Dot multijunction Solar Cell (Currently, Engineer @VLSI Industry, Bangalore)
N Laxmi (DD) : InGaN/Si Hetero-Junction Tandem Solar Cell for Next Generation Photovoltaics (Postdoc @NUS Singapore), Received Silver Medal for best project in convocation-2019
V Shiva Prasad (DD) : Optimization and scaling of Ge-Pocket TFET (Currently, Engineer @Industry, Chennai)
Neeraj V Nair (UG) : Green's Function Analytical Analysis of Short Channel Effects in DG-MOSFETs (Currently, MBA @UK)
M. Srujan Mitra (UG) : Analysis of short channel effects using scale length model (Currently, Hardwire Engineer @Qualcomm)
Ammina Vishnu Priya (UG): Designing a Junctionless Transistor based on Tunnel Dielectric (Graduated MS @University of Pennsylvania)