Publications
List of Reputed Journals Published:
Solar Energy (IF: 7.188)
Applied Physics Letter (IF: 3.791) ***Featured Article
IEEE Transactions on Electron Devices (IF: 3.221)
IEEE Transactions on Device and Materials Reliability (IF: 1.886)
IEEE Journal of Electron Device Society (IF: 2.523)
IEEE Sensor Journal (IF: 4.325)
IEEE Transactions on Nanotechnology (IF: 2.967)
Superlattices and Microstructures (IF: 2.658)
Materials Science in Semiconductor Processing (IF: 4.644)
IET Circuits, Devices & Systems (IF: 1.269)
ECS Journal of Solid State Science and Technology (IF: 2.070)
Microelectronics Reliability (IF: 1.418)
Microelectronics Journal (IF: 1.992)
AEU-International Journal of Electronics and Communications (IF: 3.169)
Physica Status Solidi (a) – Applications and Materials Science (IF: 2.170)
Optical Materials (IF: 3.754)
Semiconductor Science and Technology (IF: 1.9)
Physica Scripta (IF: 2.9)
Book/Book Chapter:
L Chandrasekar, K P Pradhan, "Applications of Graphene in Electronics : Graphene FETs", IOP Publications, 2023. Link
S Routray, K P Pradhan, "Theory of Nanostructured Kesterite Solar Cell" in Contemporary Trends in Semiconductor Devices, Springer, 2022. Link
K P Pradhan, "An Introduction to Nanoscale CMOS Technology Transistor: A Future Perspective" in Taylor and Francis, CRC Press, 2021. Link
S. K. Mohapatra, K P Pradhan, and P K Sahu, "A new nanoscale DG MOSFET design with enhanced performance a comparative study," in Signal Processing and Information Technology, Ser. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, Springer International Publishing, 2014.
International Journals:
2024
Rameez Raja Shaik, K P Pradhan, "FONOS FDSOI FET with Improved Memory Retention & Synaptic Applications", IEEE Transactions on Electron Devices, 2024 (Revision Received).
Ananya Dastidar, Tapas Kumar Patra, Sushanta Kumar Mohapatra, K P Pradhan, and Abdullah N. Alodhayb, "Sensitivity Estimation of Biosensor in a Tapered Cavity MOSHEMT", Physica Scripta, vol. 99, no. 5, pp. 055017, 2024. (IF: 2.9) DOI: doi.org/10.1088/1402-4896/ad37b0
L Chandrasekar, Rameez Raja Shaik, V Rajakumari, K P Pradhan, "A recurrence model capturing interface traps for non-zero bandgap GFETs towards dynamic mimicking of synaptic plasticity", Semiconductor Science Technology, vol. 39, no. 5, pp. 055011, 2024. (IF: 1.9) DOI: doi.org/10.1088/1361-6641/ad3844
Naveen kumar, V Rajakumari, Ram Prasad Padhy, S Routray and K P Pradhan, "A Machine Learning Approach for Optimizing and Accurate Prediction of Performance Parameters for Stacked Nanosheet Transistor", Physica Scripta, vol. 99, no. 4, pp. 046001, 2024. (IF: 2.9) DOI: https://doi.org/10.1088/1402-4896/ad2b35
2023
V Rajakumari, K P Pradhan, "BTBT based LIF Junctionless FET neuron with plausible mimicking efficiency", IEEE Transactions on Nanotechnology, vol. 22, pp. 172-77, 2023. (IF: 2.967) DOI: 10.1109/TNANO.2023.3247424
Rameez Raja Shaik, L Chandrasekar, K P Pradhan, "A Robust-Compact Model to Emulate Neuro-Mimetic Dynamics with doped-HfO2 Ferroelectric-FET based Neurons", IEEE Transactions on Nanotechnology, vol. 22, pp. 178-183, 2023. (IF: 2.967) DOI: 10.1109/TNANO.2023.3262542
2022
Rameez Raja Shaik, K P Pradhan, "Investigation on Impact of doped HfO2 thin film ferro-dielectrics on FDSOI NCFET under Back-Gate Bias Influence", IEEE Transactions on Nanotechnology, vol. 22, pp. 14-19, 2022. (IF: 2.967) DOI: 10.1109/TNANO.2022.3231693
Shibi Varku, K P Pradhan, S Routray, "Retrieving Carrier population and Collection Efficiency in CFTS/ CFTSe based Solar Cell using Low-dimensional Multiple Nanostructures", Physica Status Solidi A: Applications and Materials Science, vol. 219, no. 22, pp. 2200567, 2022. (IF: 2.170) DOI: 10.1002/pssa.202200567
V Rama Seshu, R R Shaik, K P Pradhan, "Impact of unpreventable induced interface trapped charges on HZO based FDSOI NCFET", Microelectronics Reliability, vol. 139, pp. 114748, 2022. (IF: 1.418) DOI: doi.org/10.1016/j.microrel.2022.114748
V Sakshi, V Rajakumari, K P Pradhan, "Deep Insights of SiGe PNPN Tunnel FET Cavity based Biosensors for Label Free Detection", Silicon, vol. 15, pp. 1821-34, 2023. (IF: 2.941) DOI: 10.1007/s12633-022-02085-9
R R Shaik, K P Pradhan, "Investigation on performance degradation due to induced interface trapped charges on HSO based FDSOI NCFET and sustaining it through back-gate bias", Semiconductor Science and Technology, vol. 37, pp. 105019, 2022. (IF: 2.048) DOI: doi.org/10.1088/1361-6641/ac8ecb
Shibi Varku, S Routray, K P Pradhan, "Performance limitation of Cu2FeSnS4 solar cell: Understanding impact of density of defect states", Optical Materials, vol. 133, pp. 112885, 2022. (IF: 3.754) DOI: doi.org/10.1016/j.optmat.2022.112885
V Rajakumari, K P Pradhan, "Demonstration of an ultra-low energy PD-SOI FinFET based LIF Neuron for SNN", IEEE Transactions on Nanotechnology, vol. 21, pp. 434-441, 2022. (IF: 2.967) DOI: 10.1109/TNANO.2022.3195698
L Chandrasekar, K P Pradhan, "Computationally Efficient Region-Wise Potential Based Extremely Closed-Form Analytical Modeling of B/N Substitution Doped GFETs", IEEE Transactions on Electron Devices, vol. 69, no. 8, pp. 4708-4716, 2022. (IF: 3.221) DOI: 10.1109/TED.2022.3185950
R R Shaik, L Chandrasekar, J-P Raskin, K P Pradhan, "Back-gate bias effect on the linearity of pocket doped FDSOI MOSFET", Microelectronics Journal, vol. 121, pp. 105365, 2022. (IF: 1.992) DOI: doi.org/10.1016/j.mejo.2022.105365
2021
L Chandrasekar, K P Pradhan, "Memoryless Linearity in Undoped and B-Doped Graphene FETs: A Relative Investigation to Report Improved Reliability", Microelectronics Reliability, vol. 125, pp. 114363, 2021. (IF: 1.418) DOI: doi.org/10.1016/j.microrel.2021.114363
L Sravani, S Routray, M Courel, K P Pradhan, "Loss Mechanisms in CZTS and CZTSe Kesterite Thin-film Solar Cells: Understanding the Complexity of Defect Density", Solar Energy, vol. 227, pp. 56-66, 2021. (IF: 7.188) DOI: doi.org/10.1016/j.solener.2021.08.052
L Chandrasekar, K P Pradhan, "Self-Consistent Modeling of B or N Substitution Doped Bottom Gated Graphene FET with Non-Zero Bandgap", IEEE Transactions on Electron Devices, vol. 68, no. 7, pp. 3658 - 3664, 2021. (IF: 3.221) DOI: doi.org/10.1109/TED.2021.3080224
L Sravani, S Routray, K P Pradhan, M Courel, "Kesterite Thin Film Solar Cell: Role of Grain Boundaries and Defects in CZTS and CZTSe", Physica Status Solidi A: Applications and Materials Science, vol. 218, no. 16, pp. 2100039, 2021. (IF: 2.170) DOI: doi.org/10.1002/pssa.202100039
A Sariki, K V Rao, L Chandrasekar, R R Shaik, K P Pradhan, "Is Accumulation or Inversion Mode Dielectric Modulated FET Better for Label-Free Biosensing?: A Comparative Investigation", AEU International Journal of Electronics and Communications, vol. 137, no. 153791, 2021. (IF: 3.169) DOI: doi.org/10.1016/j.aeue.2021.153791
G S Sahoo, S Routray, K P Pradhan, G P Mishra, "Electrical, Optical and Reliability Analysis of QD Embedded Kesterite Solar Cell", IEEE Transactions on Electron Devices, vol. 68, no. 11, pp. 5518-5524, 2021. (IF: 3.221) DOI: doi.org/10.1109/TED.2021.3076034
L Chandrasekar, K. P. Pradhan, "Memoryless Nonlinearity in B-Substitution Doped and Undoped Graphene FETs: A Comparative Investigation", IET Circuits, Devices & Systems, vol. 15, no. 7, pp. 641-48, Feb, 2021. (IF: 1.269) DOI: doi.org/10.1049/cds2.12059
B Vandana, S K Mohapatra, J K Das, K P Pradhan, A Kundu, B K Kaushik, "Memoryless Nonlinearity in IT JL FinFET with Spacer Technology: Investigation towards Reliability", Microelectronics Reliability, vol. 119, no. 114072, 2021. (IF: 1.418) DOI: doi.org/10.1016/j.microrel.2021.114072
Chinmay Dimri, G. P. Nikhil, P. K. Mohanty, K.P. Pradhan, R. Agarwal, S. Routray, "Investigating Single Event Transients of Advanced Fin Based Devices for Inclusion in ICs", AEÜ - International Journal of Electronics and Communications, vol. 134, no. 153675, pp. 1-12, Elsevier, Feb, 2021. (IF: 3.169) DOI: doi.org/10.1016/j.aeue.2021.153675
2020
L. Sravani, S. R. Routray, K. P. Pradhan, "Towards Quantum Efficiency Enhancement of Kesterite Nanostructured Absorber: A Prospective of Carrier Quantization Effect", Applied Physics Letter, vol.117, no. 13, 2020. (IF: 3.597) ***Featured Article by Editor-in-chief, APL. DOI: 10.1063/5.0013504
S. Routray, K. P. Pradhan, G. P. Mishra, "Effect of Nanostructure on Carrier Transport Mechanism of III-Nitride and Kesterite Solar Cells: A Computational Analysis", IEEE Journal of Electron Device Society, vol. 8, pp. 1154-61, 2020. (IF: 2.555) DOI: 10.1109/JEDS.2020.3025950
R Priyanka, Chandrasekar L, R R Shaik, K P Pradhan, "Label Free DNA Detection Techniques using Dielectric Modulated FET: Inversion or Tunneling?", IEEE Sensors Journal, vol. 21, no. 2, pp. 2316-23, 2020. (IF: 3.067) DOI: 10.1109/JSEN.2020.3019103
G. P. Nikhil, Chinmay Dimir, P. K. Mohanty, K.P. Pradhan, G. P. Mishra, S. Routray, "Geometrically-Engineered SMG FinFET Structures at 10nm: RF/DC Performance and Effect of Temperature Analysis", Silicon, vol. 13, pp. 2933–2941, 2021. (IF: 2.670) DOI: 10.1007/s12633-020-00608-w
A Samal, K P Pradhan, S K Mohapatra, "Extensive Study of Underlap Length Effect for 3-D SOI FinFET to Achieve High Switching Ratio and Low Power", Silicon, vol. 13, pp. 1059–1064, 2021. (IF: 2.670) DOI: 10.1007/s12633-020-00495-1
N Laxmi, S Routray, K P Pradhan, “Effect of Strain-Modulated Multiple Quantum Wells on Carrier Dynamics and Spectral Sensitivity of III-Nitride Photosensitive Devices”, IEEE Sensors Journal, vol. 20, no. 10, pp. 5204-5212, 2020. (IF: 3.067) DOI:10.1109/JSEN.2020.2971005
A Samal, K P Pradhan, S K Mohapatra, "Improvising the switching ratio through low-k / high-k spacer and dielectric gate stack in 3D FinFET - A simulation Perspective", Silicon, vol. 13, 2655–2660, 2021. (IF: 2.670) DOI: 10.1007/s12633-020-00618-8
R Raja Shaik, Arun G, L Chandrasekar, K P Pradhan, “A study of workfunction variation in pocket doped FD-SOI technology towards temperature analysis”, Silicon, vol. 12, pp. 3047–3056, 2020. (IF: 2.670) DOI: 10.1007/s12633-020-00399-0
2019
N Laxmi, S Routray, K P Pradhan, “III-Nitride/Si Tandem Solar Cell for High Spectral Response: Key Attributes of Auto-tunneling Mechanisms”, Silicon, vol. 12, pp. 2455-2463, 2020. (IF: 2.670) DOI: 10.1007/s12633-019-00342-y
A Vishnu Priya, V Shiva Prasad, R Raja Shaik, K P Pradhan, “An Optimized Ge Pocket SOI JLT with Efforts to Improve the Self-Heating Effect: Doping & Materials Perspective”, Silicon, vol. 12, pp. 2229–2239, 2020. (IF: 2.670) DOI: 10.1007/s12633-019-00319-x
2018
K P Pradhan, Samar K. Saha, L. Artola, P. K. Sahu, “3-D TCAD assessment of fin based hybrid devices under heavy ion irradiation in 20-nm technology”, IEEE Transactions on Device and Materials Reliability, vol. 18, no. 3, pp. 474-480, 2018. (IF: 1.499) DOI: 10.1109/TDMR.2018.2865090
2017
K P Pradhan, Samar K. Saha, P. K. Sahu, Priyanka, “Impact of Fin Height and Fin Angle Variation on the Performance Matrix of Hybrid FinFETs”, IEEE Transactions on Electron Devices, vol. 64, no. 1, pp. 52-57, 2017. (IF: 2.913) DOI: 10.1109/TED.2016.2631301
K P Pradhan, Priyanka, P. K. Sahu, “Study of fin tapering effect in nanoscale symmetric dual-k spacer (SDS) hybrid FinFETs”, Materials Science in Semiconductor Processing, Vol. 57, pp. 185–189, 2017. (IF: 3.085) DOI: 10.1016/j.mssp.2016.10.034
K P Pradhan, Priyanka, P.K. Sahu, “Investigation of asymmetric high-k underlap spacer (AHUS) hybrid FinFET from temperature perspective”, Microsystem Technologies, vol. 23, pp. 2921-2926, 2017. (IF: 1.737) DOI: 10.1007/s00542-016-2966-4
S R Panda, K P Pradhan, and P. K. Sahu “Device and Circuit Performance of Si-Based Accumulation-mode CGAA CMOS Inverter”, Materials Science in Semiconductor Processing, Elsevier, vol. 66, pp. 87-91, 2017. (IF: 3.085) DOI: 10.1016/j.mssp.2017.04.005
2016
K P Pradhan, P.K. Sahu, “Benefits of Asymmetric Underlap Dual-k Spacer Hybrid FinFET over Bulk FinFET”, IET Circuits, Devices & Systems, vol. 10, no. 5, pp. 441-447, 2016. (IF: 1.290) DOI: 10.1049/iet-cds.2016.0125
K P Pradhan, M.G.C. Andrade, P. K. Sahu, “Pros and cons of symmetrical dual-k spacer technology in hybrid FinFETs”, Superlattices and Microstructures, vol. 100, pp. 335-341, 2016. (IF: 2.12) DOI: 10.1016/j.spmi.2016.09.043
K P Pradhan, Priyanka, Mallikarjunarao, P.K. Sahu, “Exploration of symmetric high-k spacer (SHS) hybrid FinFET for high performance application,” Superlattices and Microstructures, vol. 90, pp. 191-197, 2016. (IF: 2.12) DOI: 10.1016/j.spmi.2015.12.005
K P Pradhan, Priyanka, P.K. Sahu, “Temperature dependency of double material gate oxide (DMGO) symmetric dual-k spacer (SDS) wavy FinFET,” Superlattices and Microstructures, vol. 89, pp. 355-361, 2016. (IF: 2.12) DOI: 10.1016/j.spmi.2015.11.025
Rajeev Ranjan, Mallikarjunarao, K P Pradhan and P K Sahu, “A comprehensive investigation of silicon film thickness of nanoscale DG TFET for low power applications”, Adv. Nat. Sci.: Nanosci. Nanotechnol, vol. 7, no. 3, 2016. DOI: 10.1088/2043-6262/7/3/035009
Mallikarjunarao, Rajeev Ranjan, K P Pradhan, P.K. Sahu, “Dielectric engineered symmetric underlap double gate tunnel FET (DGTFET): An investigation towards variation of dielectric materials”, Superlattices and Microstructures, vol. 96, pp. 226-233, 2016. (IF: 2.12) DOI: 10.1016/j.spmi.2016.05.035
Mallikarjunarao, Rajeev Ranjan, K P Pradhan, L. Artola, P.K. Sahu, “Spacer engineered Trigate SOI TFET: An investigation towards harsh temperature environment applications”, Superlattices and Microstructures, vol. 97, pp. 70-77, 2016. (IF: 2.12) DOI: 10.1016/j.spmi.2016.06.010
M K Yadav, K P Pradhan and P K Sahu, “A complete analytical potential based solution for a 4H-SiC MOSFET in nanoscale”, Adv. Nat. Sci.: Nanosci. Nanotechnol., vol. 7, pp. 025011-6, 2016. DOI: 10.1088/2043-6262/7/2/025011
2015
S. K. Mohapatra, K P Pradhan, D. Singh, and P. K. Sahu, “The Role of Geometry Parameters and Fin Aspect Ratio of sub-20nm SOI-FinFET: An Analysis towards Analog and RF Circuit Design”, IEEE Transactions on Nanotechnology, vol. 14, no. 3, pp. 546 - 554, 2015. (IF: 2.196) DOI: 10.1109/TNANO.2015.2415555
K. P. Pradhan, P. K. Sahu, D. Singh, L. Artola, and S. K. Mohapatra, “Reliability analysis of charge plasma based double material gate oxide (DMGO) SiGe-on-insulator (SGOI) MOSFET”, Superlattices and Microstructures, vol. 85, pp. 149-155, 2015. (IF: 2.12) DOI: 10.1016/j.spmi.2015.05.034
K P Pradhan, S. K. Mohapatra, and P. K. Sahu, “Impact of Channel and Metal Gate Work Function on GS-DG MOSFET: A Linearity Analysis”, ECS J. Solid State Sci. Technol., vol. 9, no. 9, pp. 393-397, 2015. (IF: 2.142) DOI: 10.1149/2.0211509jss
K P Pradhan, S. K. Mohapatra, P. K. Sahu, “Design Equivalent Scaling on Double Gate FinFET towards Analog & RF FOMs: A TCAD Estimation”, Journal of Low Power Electronics, vol. 11, no. 3, pp. 316-322, 2015. DOI: 10.1166/jolpe.2015.1396
P. K. Sahu, S. K. Mohapatra, and K P Pradhan, “Zero temperature-coefficient bias point over wide range of temperatures for single-and double-gate UTB-SOI n-MOSFETs with trapped charges”, Materials Science in Semiconductor Processing, vol. 31, pp. 175-183, 2015. (IF: 3.085) DOI: 10.1016/j.mssp.2014.11.036
S. K. Mohapatra, K P Pradhan, L. Artola, and P. K. Sahu, “Estimation of Analog/RF FOMs using Device Design Engineering in GS-DG-MOSFET”, Materials Science in Semiconductor Processing, vol. 31, pp. 455-462, 2015. (IF: 3.085) DOI: 10.1016/j.mssp.2014.12.026
S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Temperature dependence inflection point in Ultra-Thin Si directly on Insulator (SDOI) MOSFETs: An influence to key performance metrics”, Superlattices and Microstructures, vol. 78, pp. 134-143, 2015. (IF: 2.12) DOI: 10.1016/j.spmi.2014.11.037
K P Pradhan, M. R. Kumar, S. K. Mohapatra, P. K. Sahu, “Analytical modeling of threshold voltage for Cylindrical Gate All Around (CGAA) MOSFET using center potential”, Ain Shams Engineering Journal, vol. 6, pp. 1171-1177, 2015. (IF: 1.949) DOI: 10.1016/j.asej.2015.04.009
B Jena, K P Pradhan, S Dash, G P Mishra, P K Sahu and S K Mohapatra, “Performance analysis of undoped cylindrical gate all around (GAA) MOSFET at subthreshold regime”, Adv. in Natural Sciences: Nanoscience and Nanotech., vol. 6, pp. 1-4, 2015. DOI: 10.1088/2043-6262/6/3/035010
B Jena, K P Pradhan, P K Sahu, S Dash, G P Mishra, S K Mohapatra, “Investigation on Cylindrical Gate All Around (GAA) to Nanowire MOSFET for Circuit Application”, Facta Universitatis, Series: Electronics and Energetics, vol. 28, no. 4, pp. 637-643, 2015. DOI: 10.2298/FUEE1504637J
S. K. Mohapatra, K P Pradhan, G. S. Pati, and P. K. Sahu, “Relative appraisal of Ultra-Thin Body MOSFETs: An analytical modeling including hot carrier induced degradation", Journal of Microelectronics Electronic Components and Materials, vol. 45, pp. 57-65, 2015. (IF: 0.340) DOI: 101/76
S. K. Mohapatra, K P Pradhan, P. K. Sahu, “ZTC bias point of advanced fin based device: The importance and exploration”, Facta Universitatis, Series: Electronics and Energetics, vol. 28, no. 3, pp. 393-405, 2015. DOI: 10.2298/FUEE1503393M
K P Pradhan, S K Mohapatra, P K Sahu, S Parija, “Impact of Strain on Fully Depleted Strained Gate Stack Double Gate MOSFET: A Simulation Study”, ECTI Transactions on Electrical Eng., Electronics, and Communications, vol. 13, no.2, pp. 54-57, 2015.
2014
K P Pradhan, S. K. Mohapatra, P. K. Sahu, and D. K. Behera, “Impact of high-k gate dielectric on analog and RF performance of nanoscale DG-MOSFET”, Microelectronics Journal, vol. 45, no. 2, pp. 144-151, 2014. (IF: 1.405) DOI: 10.1016/j.mejo.2013.11.016
S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Improved Performance in GS-DG-MOSFET with Dual Material Gate and Lateral Asymmetric Channel”, Int. J. of Nano and Biomaterials, Inderscience, vol. 5, no. 4, 2014.
P. K. Sahu, S. K. Mohapatra, and K P Pradhan, “Impact of Down-scaling on Analog/RF Performance of sub-100nm GS-DG MOSFET”, Journal of Microelectronics Electronic Components and Materials, vol. 44, no. 2, pp. 119-125, 2014. (IF: 0.340) DOI: 10/12
S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Resolving the bias point for wide range of temperature applications in high-k/metal gate nanoscale DG-MOSFET”, Facta Universitatis, Series: Electronics and Energetics, vol. 27, no. 4, pp. 613-619, 2014. DOI: 10.2298/FUEE1404613M
S. K. Mohapatra, K P Pradhan, P. K. Sahu, G. S. Pati, and M. R. Kumar, “The effect of interface trapped charges in DMG-S-SOI MOSFET: a perspective study”, Adv. in Natural Sciences: Nanoscience and Nanotech., vol. 5, no. 4, pp. 1-7, 2014. DOI: 10.1088/2043-6262/5/4/045015
S. K. Mohapatra, K P Pradhan, P. K. Sahu, and M. R. Kumar, “The performance measure of GS-DG MOSFET: an impact of metal gate work function”, Adv. in Natural Sciences: Nanoscience and Nanotechnology, vol. 5, no. 2, pp. 1-6, 2014. DOI: 10.1088/2043-6262/5/2/025002
M. R. Kumar, S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “A Simple Analytical Center Potential Model for Cylindrical Gate All Around (CGAA) MOSFET”, Journal of Electron Devices, vol. 19, pp. 1648-1653, 2014.
2013
P. K. Sahu, S. K. Mohapatra, and K P Pradhan, “A Study of SCEs and Analog FOMs in GS-DG-MOSFET with Lateral Asymmetric Channel Doping”, Journal of Semiconductor Technology and Science, vol. 13, no. 6, pp. 647-654, 2013. DOI: 10.5573/JSTS.2013.13.6.647
K P Pradhan, S. K. Mohapatra, P. K. Agarwal, P. K. Sahu, D. K. Behera, and J. Mishra, “Symmetric DG-MOSFET with gate and channel engineering: A 2-D simulation study”, Microelectronics and Solid State Electronics, vol. 2, no. 1, pp. 1-9, 2013. DOI: 10.5923/j.msse.20130201.01
S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Some Device De-sign Considerations to Enhance the Performance of DG-MOSFETs”, Transactions on Electrical And Electronic Materials, vol. 14, no. 6, pp. 291-294, 2013. DOI: 10.4313/TEEM.2013.14.6.291
2012
S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Nanoscale SOI N-MOSFETS with different gate engineering having biaxial strained channel-a superlative study”, Journal of Electron Devices, vol. 15, pp. 1261-1268, 2012.
S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Investigation of Prefabrication Models of Double Gate MOSFETs in Nanoscale for High Performance Circuit Application”, Nano Trends: A Journal of Nanotech. and Its Applications, vol. 13, pp. 40-44, 2012.
International Conferences:
2024
Anshuman Bhasker, Ankit Lodhi, K P Pradhan, "Comparative Assessment of Charge Sharing and Charge Coupling Circuits: An Approach for Optimal In-Memory Computing", IEEE 7th International Conference on Devices, Circuits and Systems (ICDCS), Coimbatore, April, 2024.
Mayukh Das, Dipanjan Sen, Pranavram Venkatram, Subir Ghosh, Zhiyu Zhang, Yongwen Sun, Sakib Najam U., Ying Han, Sarkar Kalyan Jyoti, Kumar Prasannajit Pradhan, Divya Somvanshi, Zdenek Sofer, Yang Yang, Saptarshi Das, "Enhancing doping efficiency to achieve high performance p-type 2D field effect transistors", IEEE Electron Devices Technology and Manufacturing (EDTM), Bangalore, March, 2024.
Rajakumari V, Aparna Krishna Kumar, K P Pradhan, "Temperature Resilient 1-T FDSOI Neuron for Reliable Neuromorphic Computing", 10th Joint EuroSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS 2024), Athense, May, 2024.
2023
Aparna Krishna Kumar, Rajakumari V, K P Pradhan, "Mimicking of PDSOI-SONOS device-based Synapse for Spiking Neural Network", XXII International Workshop on the Physics of Semiconductor Devices (IWPSD), Madras, Chennai, December, 2023.
Poovendran M, K P Pradhan, "Program/Erase and Retention of Charge Trapping Ferro Memory and Synapse with Weight Adjustability for Neuromorphic Computing", XXII International Workshop on the Physics of Semiconductor Devices (IWPSD), Chennai, December, 2023.
Mayukh Das, Dipanjan Sen, Pranavram Venkatram, Najam U Sakib, K P Pradhan and Saptarshi Das, "Co-discovery of p-type dopants for 2D FET's using atomistic simulation, synthesis, and transport measurements", XXII International Workshop on the Physics of Semiconductor Devices (IWPSD), Chennai, December, 2023.
Rameez Raja Shaik, K P Pradhan, "Novel Ferro-Oxide-Nitride-Oxide-Semiconductor (FONOS) FDSOI FET Towards Memory and Synaptic Applications", 23rd IEEE International Conference on Nanotechnology (NANO), Jeju City, Korea, July, 2023.
Bhargav N C , Akkala Vikas, K P Pradhan, and Tejendra Dixit, "Development of an Accurate Model for Memristor Based Temperature Sensor", 7th IEEE International Conference on Trends in Electronics and Informatics (ICOEI), Bengaluru, April, 2023.
R B Naveen Kumar, V Rajakumari, S Routray, K P Pradhan, "Prediction of Performance Metrics of Nanosheet Field Effect Transistor with LR and RFR Machine Learning Models", IEEE Recent Advances In Electrical, Electronics, Ubiquitous Communication & Computational Intelligence, Chennai, April, 2023.
V Rajakumari, S R Panda, K P Pradhan, "1T FDSOI Based LIF Neuron Without Reset Circuitry: A Proposal and Investigation", 6th IEEE EDTM, South Korea, March, 2023.
2022
Rameez Raja Shaik, L Chandrasekar, V Rajakumari, K P Pradhan, "A Robust-Compact Model to Imitate the Neuronal Dynamics With 2T Based FeFET-MOSFET Capturing Temperature Effects", 6th IEEE ICEE, Bangalore, India, December, 2022.
L Chandrasekar, Rameez Raja Shaik, V Rajakumari, K P Pradhan, "An Analytical Model to Emulate the Biological Synapses Using B or N Substitution Doped Graphene FET With Hysteresis Engineering", 6th IEEE ICEE, Bangalore, India, December, 2022.
V Rama Seshu, R R Shaik, K P Pradhan, "RF Linearity/Non-Linearity FoMs analysis of FDSOI NCFET in presence of interface trap charges", 19th IEEE INDICON, Kerala, India, November, 2022.
Shibi Varku, S Routray, K P Pradhan, "Contribution of Carrier Quantization Effect towards Performance of Nanostructured CFTS / CFTSe Solar Cells", IEEE Latin American Electron Devices Conference (LAEDC), Mexico, July, 2022.
Shibi Varku, S Routray, K P Pradhan, "Understanding the Effect of Interface Trap States on Electrical and Optical Performance of CFTS Thin Film Solar Cell", IEEE Region 10 Symposium (TENSYMP), Bombay, July, 2022.
A S Dhruthi, V Rajakumari, K P Pradhan, "An Energy Efficient LIF Neuron Based on Bulk MOSFET with an N+ Buried Layer", IEEE Region 10 Symposium (TENSYMP), Bombay, July, 2022.
M Aravind, Shibi Varku, S Routray, K P Pradhan, "Investigation on Electrical and Optical Properties of Cu2FeSnSe4 (CFTSe) Based Thin Film Solar Cell for Terrestrial Applications", IEEE Region 10 Symposium (TENSYMP), Bombay, July, 2022.
2021
Sowparna P, V Rajakumari, K P Pradhan, "A Proposal of Energy Efficient Ferroelectric PDSOI LIF Neuron for Spiking Neural Network Applications", IEEE 16th Nanotechnology Materials and Devices Conference (NMDC), Vancouver, December, 2021.
L Chandrasekar, K P Pradhan, "2-Terminal Boron Substitution Doped Metal-Insulator-Graphene (MIG): Modeling and Investigation of Region-Based Electrostatics", IEEE 16th Nanotechnology Materials and Devices Conference (NMDC), Vancouver, December, 2021.
R R Shaik, K P Pradhan, "Investigation of Temperature Variation on a HSO Ferroelectric FDSOI NCFET", IEEE 16th Nanotechnology Materials and Devices Conference (NMDC), Vancouver, December, 2021.
R R Shaik, K P Pradhan, "Impact of HZO and HSO Thin Film Ferroelectric on FDSOI NCFET", IEEE 21st International Conference on Nanotechnology, Canada, July, 2021.
V Rama Seshu, R R Shaik, K P Pradhan, "Effect of Temperature on Performance of HZO Based FD-SOI NCFET", IEEE EuroSOI-ULIS, Caen, France, September, 2021.
Monika Shree K, M Jayadeep Reddy, K P Pradhan and Tejendra Dixit, "Development of Multi-physics Modeling of Plasmonics in the UV Region Using Transition Metals", IEEE Latin American Electron Device Conference, 2021.
Mooli Shashank Reddy, Tejendra Dixit and K P Pradhan, "Steep Subthreshold Swing in Double Gate NCFET:A Simulation Study", IEEE Latin American Electron Device Conference, 2021.
2020
L Chandrasekar, K P Pradhan, "Carrier Density and Quantum Capacitance Model for Doped Graphene", IEEE Electron Devices Technology and Manufacturing, Penang, March, 2020.
Nikhil G P, S R Routray, K P Pradhan, "Assessment of Analog/RF Performances for 10 nm Tri-metal Gate FinFET", IEEE Electron Devices Technology and Manufacturing, Penang, March, 2020.
S R Routray, K P Pradhan, G P Mishra, "Performance Enhancement of Double Quantum Well Solar Cell by Strain-Modulated Piezo-Phototronics Effect", IEEE Electron Devices Technology and Manufacturing, Penang, March, 2020.
Rameez R Shaik, K P Pradhan, "Linearity Behavior of a Pocket Doped p-type Ground Plane FDSOI: Impact of Back Biasing", IEEE International Conference on Emerging Electronics (ICEE), Delhi, Nov, 2020.
L Sravani, S Routray, K P Pradhan, "CZTSe Kesterite Solar Cell: The Impact of Defects on Loss Mechanisms", IEEE International Conference on Emerging Electronics (ICEE), Delhi, Nov, 2020.
P K Mohanty, G P V Y Nikhil, Chinmay Dimri, K P Pradhan, S Routray, "Estimation of Inverter Characteristics with 10nm FinFET Architectures", IEEE International Conference on Emerging Electronics (ICEE), Delhi, Nov, 2020.
L Chandrasekar, K P Pradhan, "Modeling the Electrostatics of 2-Terminal Boron or Nitrogen Substitution Doped Metal-Insulator-Graphene (MIG) Structure", IEEE International Conference on Emerging Electronics (ICEE), Delhi, Nov, 2020.
Shashank Reddy Mooli, T Dixit, K P Pradhan, "DOUBLE GATE NCFET: A New Approach To Achieve Low subthreshold Swing", IEEE International Conference on Emerging Electronics (ICEE), Delhi, Nov, 2020.
Bhargav N C, T Dixit, A N Pranavi, K P Pradhan, "Modelling of Temperature Variation Effect on the Memristance", IEEE International Conference on Emerging Electronics (ICEE), Delhi, Nov, 2020.
A N Pranavi, T Dixit, K P Pradhan, "Towards the Development of Unified Models for Memristors: Charge–Flux Relationship", IEEE International Conference on Emerging Electronics (ICEE), Delhi, Nov, 2020.
2019
Chandrasekar L, K P Pradhan, Pintu Kumar, "Comparative Study on Nonlinearity of Doped and Undoped GFET using DC Characteristics", 16th IEEE INDICON, Rajkot, December, 2019.
L Chandrasekar, K P Pradhan, "Linearity Study of Doped Graphene FET using DC Characteristics", Symposium on 2D Materials and Devices, Jodhpur, September, 2019.
A Vishnu Priya, V Shiva Prasad, K P Pradhan, "Optimization of Ge-pocket JLFET: An approach to extend the scalable limit", IEEE ICESIP, Chennai, July, 2019.
N Laxmi, S R Routray, K P Pradhan, "InGaN/Si Hetero-Junction Tandem Solar Cell with Self Tunneling Effect: Proposal & Analysis", IEEE EuroSOI-ULIS, Grenoble, France, April, 2019.
Arun G, S R Routray, K P Pradhan, "Effect of AlGaN layer in GaN/InGaN/GaN Superlattice Solar Cell", ICONN, Chennai, Jan., 2019.
2018
Rameez Raja Shaik, Arun G, K P Pradhan, “Electrically Modified SOI Structure to Reduce the Leakage”, IEEE INDICON, Coimbatore, Dec., 2018.
Arun G, S R Routray, K P Pradhan, “Effect of Polarization Induced 2DEG on Carrier Dynamics of GaN/InxGa1-xN Based Planar Solar Cells”, IEEE International Conference on Emerging Electronics (ICEE), Bengaluru, Dec., 2018.
B Vandana, P Parashar, J K Das, K P Pradhan, S Patro, S K Mohapatra, “Mole fraction dependency electrical performances of extremely thin SiGe on insulator junctionless channel transistor (SGOI JLCT)”, International Conference on Signal Processing and Communication, Noida, March, 2018.
2017
K P Pradhan, P K Sahu, “RF and Noise performance exploration of Double Gate FinFET”, International Conference on Advances in Computing, Control and Networking, Bangkok, Thailand, Feb., 2017.
2016
K P Pradhan, P K Sahu, Mallikarjunarao, “Heavy-Ion Irradiation effect in Trigate SOI Tunnel FETs with high-k Spacer Technology”, IEEE TENCON, Singapore, Nov., 2016.
K P Pradhan, P K Sahu, Rajeev Ranjan, “Investigation on Asymmetric Dual-k Spacer (ADS) Trigate Wavy FinFET: A Novel Device”, 3rd International Conference on Devices, Circuits and Systems (ICDCS), Coimbatore, March, 2016.
Mallikarjuna Rao, Rajeev Ranjan, K P Pradhan, P K Sahu, “Performance Analysis of Symmetric High-k Spacer (SHS) Trigate SOI TFET”, 3rd International Conference on Devices, Circuits and Systems (ICDCS), Coimbatore, March, 2016.
2015
K P Pradhan, Priyanka, P K Sahu, “Exploration of Double Material Gate Oxide in Symmetric Dual-k Spacer Wavy FinFET”, International Conference on Emerging Technologies: Micro to Nano (ETMN), Jaipur, October, 2015.
K P Pradhan, Mallikarjunarao, Priyanka, P K Sahu, “Analysis of Symmetric High-k Spacer (SHS) Trigate Wavy FinFET: A Novel Device”, IEEE INDICON, Delhi, Dec., 2015.
K P Pradhan, D. Singh, S. K. Mohapatra, P. K Sahu, “Double Material Gate Oxide (DMGO) SiGe-on-Insulator (SGOI) MOSFET: A proposal and analysis”, IEEE Electron Devices and Solid-State Circuits (EDSSC), Singapore, June, 2015.
K P Pradhan, D Singh, S K Mohapatra, P K Sahu, “Assessment of III-V FinFETs at 20 nm node: A Process variation analysis”, International Conference on Recent Trends in Computing (ICRTC), Delhi, March, 2015.
D Singh, K P Pradhan, S K Mohapatra, P K Sahu, “Optimization of Underlap Length for DGMOSFET and FinFET”, International Conference on Recent Trends in Computing (ICRTC), Delhi, March, 2015.
D. Singh, S. Panda, S. K. Mohapatra, K P Pradhan, P. K. Sahu, “Performance Analysis of UTB-DG MOSFET over SG MOSFET”, International Conference on Micro-electronics and Communication and Computation, San Diego, USA, Feb. 2015.
2014
S. K. Mohapatra, K P Pradhan, P. K. Sahu, D. Singh, and S. Panda, “Ultra-Thin Si Directly on Insulator (SDOI) MOSFETs at 20 nm gate length”, IEEE International Conference on High Performance Computing and Applications, Bhubaneswar, Odisha, India, Dec. 2014.
D. Singh, S. Panda, S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Static performance analysis on UTB-SG and DG MOSFETs with Si and III-V channel materials”, IEEE International Conference on High Performance Computing and Applications, Bhubaneswar, Odisha, India, Dec. 2014.
D. Singh, S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Variation study of process parameters in Trigate SOI-FinFET”, IEEE INDICON, Emerging Trends and Innovation in Technology, Pune, India, Dec. 2014.
S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Linearity and Analog Performance Analysis in GSDG-MOSFET with Gate and Channel Engineering”, IEEE INDICON, Emerging Trends and Innovation in Technology, Pune, India, Dec. 2014.
S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Improved Performance in GS-DG-MOSFET with Dual Material Gate and Lateral Asymmetric Channel," International Conference on Automatic Control, Model. & Simulation, Brasov, Romania, Jun. 2014.
2013
K P Pradhan, P. K. Agarwal, P. K. Sahu, and S. K. Mohapatra, “Role of high-k materials in Nanoscale TM-DG MOSFET: A simulation study”, National Conference on Recent Developments in Electronics, New Delhi, India, Jan. 2013.
2012
S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “A new nanoscale DG MOSFET design with enhanced performance a comparative study”, Signal Processing and Information Technology, Springer Publishing, Dubai, Dec., 2012.
P. K. Agarwal, K P Pradhan, S. K. Mohapatra, and P. K. Sahu, “Insulating layer parameters are still in reduction of kink”, IEEE Nirma University International Conference on Engineering, Ahmedabad, Dec. 2012.
K P Pradhan, P. K. Agarwal, S. K. Mohapatra, and P. K. Sahu, “The impact of high-k gate dielectric materials over short channel parameters on sub-100 nm MOSFET”, National Seminar on Ferroelectrics & Dielectrics, Bhubaneswar, India, Dec. 2012.
S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Effect of channel & gate engineering on Double Gate (DG) MOSFET-A comparative study”, IEEE International Conference on Emerging Electronics, Bombay, India, Dec. 2012.
K P Pradhan, S. K. Mohapatra, and P. K. Sahu, “An analytical surface potential and threshold voltage model of fully depleted strained-SOI MOSFETs in nanoscale with high-k gate oxide”, IEEE International Conference on Emerging Technology Trends in Electronics, Communication and Networking, Surat, Gujarat, India, Dec., 2012.
S. K. Mohapatra, K P Pradhan, and P. K. Sahu, “Investigation of dimension effects of FD-S-SOI MOSFET in nanoscale”, IEEE International Conference on Emerging Technology Trends in Electronics, Communication and Networking, Surat, Gujarat, India, Dec., 2012.