Le Trung Khoa

I earned my bachelor and master of science degrees in Electronics Engineering from Ho Chi Minh City University of Technology (HCMUT), Vietnam in 2010 and 2012, respectively.

I received the Ph.D degree from the University of Cergy-Pontoise, France in May, 2017. From June 2017 to December 2018, I was post-doctoral researcher at ETIS laboratory UMR 8051, Université Paris Seine, Université de Cergy-Pontoise, ENSEA, CNRS, in Cergy, France. I was with the Mathematical and Algorithmic Sciences Lab, Huawei Technologies, Paris, France from 2018 to June 2022 where I focused on the FEC and Distribution Matcher for optical communications. Currently, I am with DSP team, Infinera, Canada. My research interests are in error correcting code algorithms, analysis and their implementations in FPGA/ASIC.

Find more about me in my CV. GoogleScholar

Contact me:

LE TRUNG KHOA

ETIS UMR 8051, Université Paris Seine, Université Cergy-Pontoise, ENSEA, CNRS

6 av. du Ponceau

95014 CERGY, France

Email:

khoa.letrung@ensea.fr