About Me

Education

Ph.D. in Physics | Université Grenoble Alpes, France

Thesis: Engineering Spin-Orbit Torques by Interfacial Oxidation (Advisors: Gilles Gaudin, Mihai Miron)

M.S. in Electrical Engineering | University of California, Los Angeles, USA

Thesis: Electric field induced spin wave generation for beyond CMOS magnonic devices (Advisor: Kang L. Wang)

B. Tech. in Electronics and Communications Engineering | Amrita Vishwa Vidyapeetham University, India

Engineering Project: Designed, simulated and synthesized a low power, minimum hardware, 16-point DFT processor based on the CORDIC algorithm (Advisor: Pukhraj Vaya)

experience

Quantum Hardware Engineer | IQM Germany GmbH, Munich, Germany

Postdoctoral Researcher | CEA Paris-Saclay, France

Working on Quantum Electron Optics with the Nanoelectronics Group at SPEC.

Device Modelling Engineer | Inston Inc. (UCLA Startup), Los Angeles

Worked on developing Magneto-electric Random Access Memory (MeRAM) at this spin-off from Device Research Laboratory (DRL) at UCLA.

Device Engineer | Aneeve Nanotechnologies (UCLA Startup), Los Angeles

Worked on developing Carbon Nano Tube-Field Effect Transistor (CNT-FET) based Radio Frequency (RF) and flexible electronics at this UCLA startup.

Interests