Patent
2024
Seyoung Kim, Jiyong Woo, Hyun Jung Kwak, Jun Young Choi, "적층형 시냅스 어레이 및 그 제조 방법 (Stacked synaptic arrays and how they are manufactured)," Korea Application No.: 10-2024-0028949 (2024.02.28).
Jiyong Woo, Nayeon Kim, "문턱전압 향상을 위한 IZO 채널 기반 산화물 트랜지스터의 제조방법 (Manufacturing method of IZO channel-based oxide transistor to improve threshold voltage)," Korea Application No.: 10-2024-0018541 (2024.02.07).
Jiyong Woo, Nayeon Kim, "수직 적층 구조 적용을 위한 IGZO채널 기반 산화물 트랜지스터의 제조방법 (Manufacturing method of IGZO channel-based oxide transistor for vertical stacking structure application)," Korea Application No.: 10-2024-0018564 (2024.02.07).
Jiyong Woo, Jiae Jeong, "특성 조절 가능한 강유전체 커패시터 (Ferroelectric capacitor with tunable characteristics)," Korea Application No.: 10-2024-0017916 (2024.02.06).
Jiyong Woo, Hyoungjin Park, "비대칭적인 도펀트 분포를 가지는 강유전체 박막을 포함하는 커패시터 (Capacitor containing a ferroelectric thin film with asymmetric dopant distribution)," Korea Application No.: 10-2024-0015927 (2024.02.01).
2023
Jiyong Woo, "3단자 뉴로모픽 시냅스 소자 및 그 제조 방법 (THREE TERMINAL NEUROMORPHIC SYNAPTIC DEVICE AND MANUFATCTURING METHOD THEREOF)," Korea Registration No.: 10-2619267 (2023.12.26).
Jiyong Woo, Eunryeong Hong, Hyun Wook Kim, "반도체 공정 호환성 높은 문턱 스위칭 뉴런 소자 및 이의 제조 방법 (THE THRESHOLD SWITCHING NEURON DEVICE WITH HIGH SEMICONDUCTOR PROCESS COMPATIBILITY AND MANUFACTURING METHOD OF THE SAME)," Korea Application No.: 10-2023-0150552 (2023.11.03).
Jiyong Woo, Seonuk Jeon, "비채널층 3단자 시냅스 소자 및 그 동작 방법 (Channel-free 3-terminal synapse device and method of operating the same)," Korea Application No.: 10-2023-0110976 (2023.08.24).
Jiyong Woo, Heebum Kang, "모바일 이온을 함유한 산화물 전극 기반의 3단자 뉴로모픽 시냅스 소자 및 그 제조 방법 (Three terminal neuromorphic synaptic device with mobile ion contained oxide oxide electrode and manufacturing method thereof)," Korea Registration No.: 10-2563555 (2022.08.03).
Jiyong Woo, "전이금속 산화물 기반 3차원 구조 뉴로모픽 소자및 그 제조 방법 (Transition metal oxide based 3dimensional structure neuromorphic device and method of manufacturing the same)," Korea Registration No.: 10-2526214 (2023.04.24).
Jiyong Woo, Heebum Kang, "OXIDE ELECTRODE-BASED 3-TERMINAL NEUROMORPHIC SYNAPTIC DEVICE CONTAINING MOBILE IONS, AND METHOD OF MANUFACTURING THE SAME," U.S. Patent Application No.: 18/122,696 (2023.03.16).
Jiyong Woo, "3단자 시냅스 소자 및 그 제조 방법 (Three terminal synaptic device and manufacturing method thereof)," Korea Registration No.: 10-2493039 (2023.01.25).
2022
Jong-Pil Im, Seung Eon Moon, Jeong Hun Kim, Jiyong Woo, Yeriaron Kim, Solyee Im, “최대 전력점 추적 효율 측정 시스템 및 방법,” Korea Registration No.: 10-2460984 (2022.10.26).
Seung Eon Moon, Bae Ho Park, Sung-Min Yoon, Seung Yeol Kang, Jeong Hun Kim, Jiyong Woo, Jong-Pil Im, Chansoo Yoon, Jihoon Jeon, “메모리 소자 및 그 제조 방법” Korea Registration No.: 10-2430789 (2022.08.04).
Jiyong Woo, Seonuk Jeon, "합성곱 신경망의 하드웨어 커널 시스템 (Hardware kernel system for convolution neural network)," Korea Application No.: 10-2022-0156862 (2022.11.22).
Jiyong Woo, Heebum Kang, "모바일 이온을 함유한 산화물 전극 기반의 3단자 뉴로모픽 시냅스 소자 및 그 제조 방법 (Three terminal neuromorphic synaptic device with mobile ion contained oxide electrode and manufacturing method thereof)," Korea Application No.: 10-2022-0034647 (2022.03.21).
Jiyong Woo, "THREE TERMINAL NEUROMORPHIC SYNAPTIC DEVICE AND METHOD FOR MANUFACTURING THE SAME," U.S. Patent Application No.: 2022/17580640 (2022.01.21).
Jiyong Woo, "듀얼 이온 제어형 3단자 시냅스 소자 (Dual ion-controlled 3-terminal synaptic device)," Korea Application No.: 10-2022-0009003 (2022.01.21).
Jiyong Woo, Heebum Kang, Hyun Wook Kim, Eun Ryeong Hong, "균일한 이온 이동이 가능한 3단자 시냅스 소자 (3-terminal synaptic device capable of uniform ion movement)," Korea Application No.: 10-2022-0009004 (2022.01.21).
2021
Jiyong Woo, "전이금속 산화물 기반 3차원 구조 뉴로모픽 소자및 그 제조 방법 (Transition metal oxide based 3dimensional structure neuromorphic device and method of manufacturing the same)," Korea Application No.: 10-2021-0161845 (2021.11.23).
Jiyong Woo, "3단자 뉴로모픽 시냅스 소자 및 그 제조 방법 (Three terminal synaptic device and manufacturing method thereof)," Korea Application No.: 10-2021-0117132 (2021.09.02).
Seungeon Moon, Bae Ho Park, Sung-Min Yoon, Seung Youl Kang, Jeong Hun Kim, Jiyong Woo, Jong Pil Im, Woon Chansoo, Ji Hoon Jeon, “Memory device and method of manufacturing the same.” U.S. Patent Application Publication No.: 2021/17089286 (2021.05.06).
Jong Pil Im, Seungeon Moon, Jeong Hun Kim, Jiyong Woo, Yeriaron Kim, Solyee Im, “System and method of measuring maximum power point tracking efficiency,” U.S. Patent Application Publication No.: 2021/0119483 (2021.04.22).
Jiyong Woo, "선형적 컨덕턴스를 갖는 3단자 뉴로모픽 시냅스 소자 (Three terminal neuromorphic synaptic devices having linear conductance)," Korea Application No.: 10-2021-0046245 (2021.04.09).
Jiyong Woo, "3단자 시냅스 소자 및 그 제조 방법 (Three terminal synaptic device and manufacturing method thereof)," Korea Application No.: 10-2021-0029314 (2021.03.05).
2020
Minkyu Yang, Youngbae Kim, Jiyong Woo, Hyunsang Hwang, “메모리 소자 및 메모리 셀 어레이)” Korea Registration No.: 10-2157360 (2020.09.11).
Hyunsang Hwang, Jiyong Woo, Dongwook Lee, “Neuron circuit and neuromorphic system comprising the same (뉴런회로 및 이를 포함하는 뉴로모픽 시스템),” Korea Registration No.: 10-2067189 (2020.01.10).
2019
Hyunsang Hwang, Jiyong Woo, “Potentiation operation method of the synapse device for application on neuromorphic system (뉴로모픽 시스템 응용을 위한 시냅스 장치의 강화 동작 방법),” Korea Registration No.: 10-2002212 (2019.07.15).
2017
Hyunsang Hwang, Jiyong Woo, Dongwook Lee, “Integrate-and-fire neuron circuit and operating method thereof (발화형 뉴런 회로 및 이의 동작 방법),” Korea Application No.: 10-2017-0081418 (2017.06.27).
2016
Hyunsang Hwang, Jiyong Woo, “Synapse device for application on neuromorphic system, method of fabricating the same, and synapse circuit component including the same,” Korea Application No.: 10-2016-0155948 (2016.11.22).
2015
Hyunsang Hwang, Jiyong Woo, “Two terminal switching device having bipolar switching property, method of fabricating the same, and resistive memory cross-point array having the same,” U.S. Patent No.: US 9178023 B2 14/229,817 (2015.11.03).
Hyunsang Hwang, Minkyu Yang, Youngbae Kim, Jiyong Woo, “Memory device and memory cell array,” U.S. Patent Application Publication No.: 2015/0221701 (2015.08.06).
2014
Hyunsang Hwang, Minkyu Yang, Youngbae Kim, Jiyong Woo, “Memory device and memory cell array (메모리 소자 및 메모리 셀 어레이),” Korea Application Publication No.: 10-2014-0012210 (2014.02.03).
2013
Hyunsang Hwang, Jiyong Woo, “2-terminal switching device having bipolar switching property, fabrication methods for the same, and resistance memory cross-point array having the same (양방향 스위칭 특성을 갖는 2-단자 스위칭 소자, 이의 제조방법 및 이를 포함하는 저항성 메모리 소자 크로스-포인트 어레이),” Korea Registration No.: 10-2013-0097868 (2013.08.19).
2011
Hyunsang Hwang, Jiyong Woo, Seungjae Jung, “Resistive random access memory device including internal resistance and method of manufacturing the same (내부 저항을 포함하는 저항 변화 메모리 소자 및 이의 제조방법),” Korea Application No.: 10-2011-0127790 (2011.12.01).