Generates stable DC voltage/Current against temperature and supply variations over a wide temperature range and low power consumption
J. Lee and S.H. Cho, " A 210 nW 29.3 ppm/˚C 0.7 V Voltage Reference with a Temperature Range of -50 to 130 ˚C in 0.13 μm CMOS," IEEE Symposium on VLSI Circuits, 2011.
VDD: 0.7 to 1.8 V
Power: 210 nW @ 0.7 V
Temp. range: -50 to 130 ˚C
Temp. coefficient: 29.3 ppm/˚C
Line sensitivity: 337 ppm/V
J. Lee and S.H. Cho, " A 1.4 μW 24.9 ppm/˚C Current Reference with Process Insensitive Temperature Compensation in 0.18 m CMOS," IEEE J. Solid-State Circuits, 2012.
VDD: 1 V
Power: 1.4 μW
Temp. range: 0 to 100 ˚C
Temp. coefficient: 24.9 ppm/˚C
Line sensitivity: 0.13 %/V
Integrated circuit on a chip that produces a periodic, oscillating signal, often a sine wave or a square wave
J. Lee, P. Park, S. Cho and M. Je, “A 4.7MHz 53μW Fully Differential CMOS Reference Clock Oscillator with –22dB Worst-Case PSNR for Miniaturized SoCs,”, ISSCC, 2015.
Chip area: 0.086μm²
53μW from 1.4V supply at 4.7MHz output
No decoupling capacitors
No supply regulator
0.04% RMS period jitter
-22dB worst-case PSNR
J. Lee, A. George and M. Je, “A 1.4V 10.5MHz Swing-Boosted Differential Relaxation Oscillator with 162.1dBc/Hz FOM and 9.86psrms Period Jitter in 0.18μm CMOS", ISSCC, 2016.
Chip area: 0.015μm²
219.8μW from 1.4V supply at 10.5MHz, and 49.72% duty cycle
9.86psrms (0.01%) period jitter
FOM: 157.7 @ 1kHz, 162.1 @ 100kHz