Publications

• International 

[20] J. Choi, I. A. Wahla, S. Kang, J. Park, S. Kim and I. -C. Hwang, "Fractional-N Sampling Phase-Locked Loop with time domain sign generation using Aux-DTC and fast locking AFC," 2025 Asia-Pacific Microwave Conference (APMC), Jeju, Korea, Republic of, 2025

[19] J. Park, J. Choi, S. Kang, Y. R. Yun, I. A. Wahla and I. -C. Hwang, "A ΔΣ Frequency-to-Digital Converter Based Sub-Sampling DPLL without Extra Modules in Auxiliary Loop," 2025 Asia-Pacific Microwave Conference (APMC), Jeju, Korea, Republic of, 2025

[18] Y. -R. Yun, J. -S. Mok and I. -C. Hwang, "A 40MHz Skewed Crystal Oscillator with Duty Cycle Corrector and Frequency Doubler for WIFI 6 in a 22nm CMOS," 2024 International Conference on Electronics, Information, and Communication (ICEIC), Taipei, Taiwan, 2024

[17] K. T. Min and I. -C. Hwang, "Tomato Farm Environment Forecasting System Using Machine Learning," 2021 International Conference on Electronics, Information, and Communication (ICEIC), Jeju, Korea (South), 2021

[16] M. A. Akram, M. -H. Lee, D. -H. Cho and I. -C. Hwang, "A 0.012mm2, 0.96-mW All-Digital Multiplying Delay-Locked Loop Based Frequency Synthesizer for GPS-L4 band," 2020 IEEE International Conference on Consumer Electronics (ICCE), Las Vegas, NV, USA, 2020

[15] Dongsoon Jung, Kyung-Sung Kim, and In-Chul Hwang, "A small-area and low-power digitally-controlled boost converter for LED driver IC," International Conference on Electronics, Information, and Communication (ICEIC), pp. 794-797, Jan. 2017

[14] S. Ryu, I. -C. Hwang, A. Cho and S. Lee, "Multi-band wide tuning range CMOS VCO with Hybrid Inductor for LTE standard," 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 2013

[13] T. -J. Oh, A. Cho, S. -L. Ki and I. -C. Hwang, "A low-power and low-cost digitally-controlled boost LED driver IC for backlights," 2012 IEEE Asian Solid State Circuits Conference (A-SSCC), Kobe, Japan, 2012

[12] Myung-Woon Hwang et al., "A multi-mode multi-band CMOS direct-conversion mobile-TV tuner for DVB-H/T and T-DMB/DAB applications," 2008 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, 2008

[11] Jedon Kim et al., "High performance NPN BJTs in standard CMOS process for GSM transceiver and DVB-H tuner," IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006, San Francisco, CA, USA, 2006

[10] Kun-Seok Lee, Eun-Yung Sung, In-Chul Hwang and Byeong-Ha Park, "Fast AFC technique using a code estimation and binary search algorithm for wideband frequency synthesis," Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005., Grenoble, France, 2005

[9] Young-Jin Kim et al., "A GSM/EGSM/DCS/PCS direct conversion receiver with integrated synthesizer," 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers, Forth Worth, TX, USA, 2004

[8] In-Chul Hwang, Han-Il Lee, Kun-Seok Lee, Je-Kwang Cho, Kyung-Suc Nah and Byeong-Ha Park, "A /spl Sigma/-/spl Delta/ fractional-N synthesizer with a fully-integrated loop filter for a GSM/GPRS direct-conversion transceiver," 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525), Honolulu, HI, USA, 2004

[7] Lee, Han-il, et al. "A SD Fractional-N Frequency Synthesizer using a wideband integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA Applications." 29th European Solid-State Circuits Conference. 2003

[6] In Chul Hwang and Sung-Mo Kang, "A self-regulating VCO with supply sensitivity of <0.15%-delay/1%-supply," 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315), San Francisco, CA, USA, 2002

[5] Kim, Chulwoo, In-Chul Hwang, and Sung-Mo Kang. "Low-power small-area plus or minus 7. 28 ps Jitter 1 GHz DLL-based clock generator." DIG TECH PAP IEEE INT SOLID STATE CIRCUITS CONF. pp. 142-143+ 453+ 123. 2002

[4] Inchul Hwang, Soonsub Lee, Sangwon Lee and Soowon Kim, "A digitally controlled phase-locked loop with fast locking scheme for clock synthesis application," 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056), San Francisco, CA, USA, 2000

[3] Kwan-Yeob Chae, Hoon-Jae Ki, In-Chul Hwang and Soo-Won Kim, "Double precharge TSPC for high-speed dual-modulus prescaler," ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361), Seoul, South Korea, 1999

[2] In-Chul Hwang, Sung-Nam Kim, Young-Woo Kim and Soo-Won Kim, "An LPC cepstrum processor for speech recognition," 1998 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, CA, USA, 1998, pp. 233-236 vol.4

[1] Woo-Hyun Paik, In-Chul Hwang, Jae-Wan Kim and Soo-Won Kim, "Data dependent precharging dynamic chain architecture for low power end high speed adders," Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334), Portland, OR, USA, 1997

• Domestic

• International

[38] I. A. Wahla, J. Lee, Y. -R. Yun, M. A. Akram and I. -C. Hwang, "A Fast-Transient Digital LDO With Asynchronous Coarse and Dual-Mode Fine Regulation Loops," in IEEE Open Journal of Power Electronics, vol. 7, pp. 330-341, 2026

[37] Ibrar Ali Wahla, Muhammad Abrar Akram, and In-Chul Hwang, "An Ultra-Fast 460-mA Capacitorless DLDO Achieving 8-ns Recovery Time and 99.58% Current Efficiency," Journal of Semiconductor Technology and Science, vol. 25, no. 1, pp. 94-101, Feb. 2025

[36] M. Abrar Akram, I. Ali Wahla, K. -S. Kim and I. -C. Hwang, "A Four-Phase Digital Buck Converter With MDLL-Based Adaptive Switching Frequency Compensation," in IEEE Access, vol. 12, pp. 180404-180414, 2024

[35] H. Kim, K. Ko, K. Kwon, I. -C. Hwang and S. Park, "Fast Electrical Balance Duplexer Tuning Using Neural Networks for RF Self-Interference Cancellation in In-Band Full-Duplex Systems," in IEEE Access, vol. 12, pp. 151805-151824, 2024

[34] Muhammad Abrar Akram, Ibrar Ali Wahla, Bo-Hyeon Lee, and In-Chul Hwang, "A 65-nm duty-cycle corrector achieving 10% to 90% duty-correction range with <0.86% duty-cycle error," Microelectronics Journal, vol. 150, p. 106267, Aug. 2024

[33] Ji-Sub Yoon, Doing-In Choi, Seungyoung Park, and In-Chul Hwang, "Performance Optimization of IPN in RF PLL using Bayesian Optimization," Journal of Semiconductor Technology and Science, vol. 24, no. 2, pp. 69-75, Apr. 2024

[32] S. Yun et al., "A 2.4/5 GHz Dual-Band Low-Noise and Highly Linear Receiver With a New Power-Efficient Feedforward OPAMP for WiFi-6 Applications," in IEEE Access, vol. 11, pp. 137264-137273, 2023

[31] J. -W. Jang, I. A. Wahla, J. Choi, M. A. Akram and I. -C. Hwang, "A Fast-Transient Fully-Integrated Digital LDO With Current-Estimation Algorithm Based Coarse Loop," in IEEE Transactions on Power Electronics, vol. 39, no. 1, pp. 94-100, Jan. 2024

[30] M. A. Akram, I. -C. Hwang and S. Ha, "Power Delivery Networks for Embedded Mobile SoCs: Architectural Advancements and Design Challenges," in IEEE Access, vol. 9, pp. 46573-46588, 2021

[29] M. A. Akram, W. Hong, S. Ha and I. -C. Hwang, "Capacitor-Less Dual-Mode All-Digital LDO With ΔΣ-Modulation-Based Ripple Reduction," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 5, pp. 1620-1624, May 2021

[28] M. A. Akram, I. -C. Hwang and S. Ha, "Architectural Advancement of Digital Low-Dropout Regulators," in IEEE Access, vol. 8, pp. 137838-137855, 2020

[27] M. A. Akram, K. -S. Kim, S. Ha and I. -C. Hwang, "Output-Capacitorless Tri-Loop Digital Low Dropout Regulator Achieving 99.91% Current Efficiency and 2.87 fs FOM," in IEEE Transactions on Power Electronics, vol. 36, no. 2, pp. 2044-2058, Feb. 2021

[26] Akram, M.A., Kim, KW., Bae, JH. et al. All digital duty-cycle corrector for integrated phase noise improvement in phase-locked loop. Analog Integr Circ Sig Process 101, 641–649 (2019)

[25] In-Chul Hwang, "Low-noise, High-PSRR and Positive-TC Voltage Reference for a Temperature- and Supply-compensated CMOS Ring Oscillator," IEIE Transactions on Smart Processing & Computing, vol. 8, no. 4, pp. 331-334, Aug. 2019

[24] M. A. Akram, W. Hong and I. -C. Hwang, "Capacitorless Self-Clocked All-Digital Low-Dropout Regulator," in IEEE Journal of Solid-State Circuits, vol. 54, no. 1, pp. 266-276, Jan. 2019

[23] M. A. Akram, W. Hong and I. -C. Hwang, "Fast Transient Fully Standard-Cell-Based All Digital Low-Dropout Regulator With 99.97% Current Efficiency," in IEEE Transactions on Power Electronics, vol. 33, no. 9, pp. 8011-8019, Sept. 2018

[22] Akram, M.A., Hwang, IC. Fully digital fast transient phase-locked digital LDO-embedded-MDLL for DVFS applications. Analog Integr Circ Sig Process 93, 123–136 (2017)

[21] Seong-Jin Yoon, Je-Kwang Cho, and In-Chul Hwang, "High Efficiency Multi-Channel LED Driver IC with Low Current-Balance Error Using Current-Mode Current Regulator," Journal of Electrical Engineering and Technology, vol. 12, no. 4, pp. 1593-1599, July 2017

[20] C. -H. Jeong, A. Abdullah, Y. -J. Min, I. -C. Hwang and S. -W. Kim, "All-Digital Duty-Cycle Corrector With a Wide Duty Correction Range for DRAM Applications," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 1, pp. 363-367, Jan. 2016

[19] Kim, YJ., Hwang, IC., Park, SY. et al. CMOS transceiver with high input dynamic range and wide modulation-depth for RFID and NFC readers. Analog Integr Circ Sig Process 85, 343–352 (2015)

[18] T. -J. Oh and I. -C. Hwang, "A 110-nm CMOS 0.7-V Input Transient-Enhanced Digital Low-Dropout Regulator With 99.98% Current Efficiency at 80-mA Load," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 23, no. 7, pp. 1281-1286, July 2015

[17] Nitin Rawat, In-Chul Hwang, Yishi Shi, and Byung-Geun Lee, "Optical image encryption via photon-counting imaging and compressive sensing based ptychography," Journal of Optics, vol. 17, no. 6, p. 065704, May 2015

[16] Kyeong-Woo Kim, Muhammad Abrar Akram, and In-Chul Hwang, "A Stability-Secured Loop Bandwidth Controllable Frequency Synthesizer for Multi-Band Mobile DTV Tuners," IEIE Transactions on Smart Processing and Computing, vol. 4, no. 3, pp. 141-144, June 2015

[15] Sang-Geun Bae, Kyeong-Woo Kim, and In-Chul Hwang, "An 180 nm CMOS 1.84-to-3.62 GHz fractional-N frequency synthesizer with skewed-reset PFD for removing noise-folding effect," IEICE Electronics Express, vol. 11, no. 15, pp. 20140490, Aug. 2014

[14] C.-H. Jeong, C.-K. Kwon, H. Kim, In-Chul Hwang, and S.-W. Kim, "Low-power, wide-range time-to-digital converter for all digital phase-locked loops," Electronics Letters, vol. 49, no. 2, pp. 96-97, Jan. 2013

[13] I. -C. Hwang, "A 0.236 mm  2 , 3.99 mW Fully Integrated 90 nm CMOS L1/L5 GPS Frequency Synthesizer Using a Regulated Ring VCO," in IEEE Microwave and Wireless Components Letters, vol. 22, no. 6, pp. 324-326, June 2012

[12] Y. -J. Kim, I. -C. Hwang and D. Baek, "A Switchless Zigbee Frontend Transceiver With Matching Component Sharing of LNA and PA," in IEEE Microwave and Wireless Components Letters, vol. 20, no. 9, pp. 516-518, Sept. 2010

[11] I. -C. Hwang and D. Baek, "A 0.93-mA Spur-Enhanced Frequency Synthesizer for L1/L5 Dual-Band GPS/Galileo RF Receiver," in IEEE Microwave and Wireless Components Letters, vol. 20, no. 6, pp. 355-357, June 2010

[10] I.-C. Hwang and S.-G. Bae, "Low-glitch, high-speed charge-pump circuit for spur minimisation," Electronics Letters, vol. 45, no. 25, pp. 1273-1274, Dec. 2009

[9] In-Chul Hwang, "Area-efficient and self-biased capacitor multiplier for on-chip loop filter," Electronics Letters, vol. 42, no. 24, pp. 1392-1393, Nov. 2006

[8] Young-Jin Kim et al., "A GSM/EGSM/DCS/PCS direct conversion receiver with integrated synthesizer," in IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 2, pp. 606-613, Feb. 2005

[7] Han-il Lee et al., "A /spl Sigma/-/spl Delta/ fractional-N frequency synthesizer using a wide-band integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications," in IEEE Journal of Solid-State Circuits, vol. 39, no. 7, pp. 1164-1169, July 2004

[6] In-Chul Hwang, Chulwoo Kim and Sung-Mo Kang, "A CMOS self-regulating VCO with low supply sensitivity," in IEEE Journal of Solid-State Circuits, vol. 39, no. 1, pp. 42-48, Jan. 2004

[5] Chulwoo Kim, In-Chul Hwang and Sung-Mo Kang, "A low-power small-area /spl plusmn/7.28-ps-jitter 1-GHz DLL-based clock generator," in IEEE Journal of Solid-State Circuits, vol. 37, no. 11, pp. 1414-1420, Nov. 2002

[4] In-Chul Hwang, Sang-Hun Song and Soo-Won Kim, "A digitally controlled phase-locked loop with a digital phase-frequency detector for fast acquisition," in IEEE Journal of Solid-State Circuits, vol. 36, no. 10, pp. 1574-1581, Oct. 2001

[3] In-Chul Hwang and Sung-Mo (Steve) Kang, "Differential pass-transistor clocked flipflop," Electronics Letters, vol. 37, no. 12, pp. 732-734, June 2001

[2] Ki, H. J., Lee, C. S., Paik, W. H., Hwang, I. C., Chae, K. Y., Yoo, J. S., & Kim, S. W. (2000). A low power 8-tap digital FIR filter for PRML read channels. International Journal of Electronics, 87(4), 445–455

[1] Sung-Nam Kim, In-Chul Hwang, Young-Woo Kim and Soo-Won Kim, "A VLSI chip for isolated speech recognition system," in IEEE Transactions on Consumer Electronics, vol. 42, no. 3, pp. 458-467, Aug. 1996

• Domestic

• U.S.

[6] IC Hwang, M Hwang, J Moon, H Jo, "Low noise reference circuit of improving frequency variation of ring oscillator", US Patent 8,405,376, 2013

[5] H Lee, IC Hwang, "Multi-band transceiver for a wireless communication system", US Patent 7,181,181, 2007

[4] H Lee, IC Hwang, "Frequency synthesizer using a wide-band voltage controlled oscillator and a fast adaptive frequency calibration method", US Patent 7,154,348, 2006

[3] YJ Kim, IC Hwang, H Lee, JH Lee, "Capacitance multiplier", US Patent 7,113,022, 2006

[2] YJ Kim, K Nah, IC Hwang, YS Son, "Circuit for compensating for the declination of balanced impedance elements and a frequency mixer", US Patent 7,106,095, 2006

[1] IC Hwang, SM Kang, BE Kim, "Self-regulating voltage controlled oscillator", US Patent 6,861,911, 2005

• KR