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[Jun. 2026] Young-Ryul Yun, Seung-Jin Yeo, Jae-hong Ko, Muhammad Abrar Akram, and In-Chul Hwang
Paper accepted in IEEE Transactions on Circuits and Systems II (TCAS-II).
"A Low-Power Semi-Digital Spectrum-Balancing Adaptive Equalizer for 8Gb/s Serial Links"
[May 2026] Young-Ryul Yun, Min-Jeong Son, Do-Yeon Jeon, Ji-Seul Yoon, Muhammad Abrar Akram, and In-Chul Hwang
Presented at oral session of IEEE International Symposium on Circuits and Systems (ISCAS) 2026.
"A1.2−3.4 Gb/s Low-Power Multiphase CDR with Glitch-Free Bang-Bang Phase Detector"
[Mar. 2026] Jonghoon Park, Dongyong Choi, Jungmin Kwon, Kabseok Ko, Kuduck Kwon, In-Chul Hwang and Seungyoung Park
Paper accepted in IEIE Journal of Semiconductor Technology and Science (JSTS).
"Batch Bayesian Optimization for Minimizing IPN in RF PLLs"
[Jan. 2026] Young-Ryul Yun, Min-Jeong Son, Do-Yeon Jeon, Ji-Seul Yoon, Muhammad Abrar Akram, and In-Chul Hwang
Paper accepted in IEEE International Symposium on Circuits and Systems (ISCAS) 2026.
"A1.2−3.4 Gb/s Low-Power Multiphase CDR with Glitch-Free Bang-Bang Phase Detector"
[Jan. 2026] Ibrar Ali Wahla, Jongwoon Lee, Young-Ryul Yun, Muhammad Abrar Akram and In-Chul Hwang
Paper accept in IEEE Open Journal of Power Electronics.
"A Fast-Transient Digital LDO With Asynchronous Coarse and Dual-Mode Fine Regulation Loops"
[Dec. 2025] Jonghoon Park, Joowon Choi, Seunghyun Kang and In-Chul Hwang
Presented at poster session of KIEES APMC 2025.
"Fractional-N Sampling Phase-Locked Loop with time domain sign generation using Aux-DTC and fast locking AFC"
"A ∆Σ Frequency-to-Digital Converter Based Sub-Sampling DPLL Without Extra Modules in Auxiliary Loop"
[Oct. 2025] Jong-Woon Lee, Ibrar Ali Wahla and In-Chul Hwang
Recieved LG Electronic Award in ISOCC 2025.
"A Capacitor-Free Digital Low Drop-Out Regulator with Gain-Boost Search Algorithm-based Controller"
[Sep. 2025]
ICSL, 제25회 RF/아날로그 회로 워크샵에서 RF/아날로그 회로 설계 분야 우수 대학원 연구실로 선정되었습니다.
전도연, 제25회 RF/아날로그 회로 워크샵에서 우수 논문 발표자로 선정되었습니다.
"Adaptive Equalizer with Vertical Eye Margin (VEM) Optimization Based on Jointly Adaptive CTLE and DFE"
[Aug. 2025] 최주원, 박종훈, 강승현, 황인철
한국전자파학회(KIEES) 주관 2025 하계종합학술대회에서 우수 논문 수상하였습니다.
"Digital-to-Time Converter with Variable Threshold Comparator for High Linearity"
[Oct. 2024] Ibrar Ali Wahla, Muhammad Abrar Akram, and In-Chul Hwang
Paper accepted in IEIE Journal of Semiconductor Technology and Science(JSTS).
"An Ultra-Fast 460-mA Capacitorless DLDO Achieving 8-ns Recovery Time and 99.58% Current Efficiency"
[Sep. 2024] Muhammad Abrar Akram, Ibrar Ali Wahla, Kyung-Sung Kim and In-Chul Hwang
Paper accepted in IEEE Access.
"A 4-Phase Digital Buck Converter with MDLL-based Adaptive Switching Frequency Compensation"
[Sep. 2024] 윤지섭, 목정수
대한전자공학회(IEIE) 주관 RF/아날로그 회로 워크샵에서 우수 연구실 선정. 윤지섭, 목정수 우수 논문으로 선정되었습니다.
기업특별상 : 목정수, "Jointly adaptation algorithm for Rx equalizer(CTLE, DFE) at NRZ up to 8.1Gbps"
Best Paper Award : 윤지섭, "LCO Rejection Sub-Sampling Fractional-N PLL"
[Apr. 2024] Muhammad Abrar Akram, Ibrar Ali Wahla, Bo-Hyeon Lee, and In-Chul Hwang
Elsevier주관 Microelectronics Journal 2024에 Accept 되었습니다.
"A 65-nm duty-cycle corrector achieving 10% to 90% duty-correction range with <0.86% duty-cycle error"
[Apr. 2024] Ji-Sub Yoon, Doing-In Choi, Seungyoung Park and In-Chul Hwang
IEIE주관 Journal of Semiconductor Technology and Science(JSTS) 2024에 Accept 되었습니다.
"Performance Optimization of IPN in RF PLL using Bayesian Optimization"
[Mar. 2024] Muhammad Abrar Akram
Appointed as an Assistant Professor in Qatar University Electronic Engineering.
[Fab. 2024] Muhammad Abrar Akram
Presented at IEEE ISSCC 2024, Session 3, Analog Techniques.
[Jan. 2024] Young-Ryul Yun, Jeong-Su Mok and In-Chul Hwang
Presented at oral session of IEEE ICEIC 2024.
"A 40MHz Skewed Crystal Oscillator with Duty Cycle Corrector and Frequency Doubler for WIFI 6 in a 22nm CMOS"
[Jan. 2024] Jin-Woong Jang, Ibrar Ali Wahla, Junsik Choi, Muhammad Abrar Akram and In-Chul Hwang
Paper accepted in IEEE Transactions on Power Electronics 2024.
"A Fast-Transient Fully-Integrated Digital LDO With Current-Estimation Algorithm Based Coarse Loop"
[Sep. 2022] 윤영률, 손민정, 남강원
제 23회 반도체 설계대전 기업특별상 수상하였습니다.
"A Look-Up Table (LUT) based Fractional-N Digital Sub-Sampling Multiplying Delay-Locked Loop (DS-MDLL)"
[Sep. 2018] Muhammad Abrar Akram, Wook Hong, and In-Chul Hwang
IEEE Journal of Solid-State Circuits에 accept됨
"Capacitor-less self-clocked all-digital low-dropout regulator"
[Dec. 2017] 정동순, 황인철
대한전자공학회 2017년도 추계학술대회 우수발표 논문상 수상
"분수분주가 가능한 디지털 위상동기루프 기반의 벅 컨버터"
[Oct. 2017] Muhammad Abrar Akram, Wook Hong, and In-Chul Hwang
IEEE Tr. on Power Electronics에 accept됨
"Fast Transient Fully Standard-Cell-Based All Digital Low-Dropout Regulator with 99.97% Current Efficiency"
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