Reliability Analysis
Level of Aging Effects
Temporal degradation of CMOS Inverter
Soft Error Mechanism by Neutron
Voltage Bootstrapping Schmitt Trigger (VB-ST) Circuit
Transistor (𝑀2) is used in the pull-up network to increase the threshold voltage and overcome the output voltage drop in the inverter circuit.
Transistor𝑀3 acts as MOS capacitor to bootstrap the voltage collected from V𝑌 and passed to the output node. Hence, the 𝑀3 transistor is named as a bootstrapped capacitor with a dummy MOS device or bootstrapped transistor.
The feedback arrangement of the transistor 𝑀4 with transistor 𝑀6 is used to increase the noise immunity of the inverter circuit.
This feedback connection also protects the output logic state from a radiation particle that could strike the sensitive nodes of the circuit.
VB-ST based Radiation Hardened Latch
The radiation hardened and soft error tolerant latch is designed by utilizing the benefits of the proposed VB-ST inverter circuit.
In the proposed VB-ST based latch, inverter I1 is replaced by the VB-ST circuit to enhance the soft error robustness.
The radiation hardening would be further improved, when we replace all three inverter circuits by the VB-ST circuit but the latch design would be more complex.
The latch is working in the transparent mode when CLK is logic 1 and in the latch mode when CLK is logic 0.
The effect of radiation is higher when the circuit operates in the latch mode.
N Gupta, N Agrawal, N S Dhakad, A P Shah, S K Vishvakarma and P Girard, “Voltage Bootstrapped based Radiation Hardened Latch design for Reliable Circuits ”, In Proceedings of the 2021 on Great Lakes Symposium on VLSI, 22-25 June 2021, pp. 307–312. [PDF]