PUBLICATIONS
Journal Papers
2024
H. Kim, J.-H. Kim, M. Jeong, D. Lee, J. Kim, M. Lee, G. Kim, J. Kim, J.-S. Lee, J. Lee "Bioelectronic Sutures with Electrochemical pH-Sensing for Long-Term Monitoring of the Wound Healing Progress," Advanced Functional Materials, July. 2024.
J. Lee, S. Jang, M. Braendli, T. Morf, M. Kossel, P.-A. Francese, G. Kim, "A 2-lane discrete multitone wireline receiver datapath with far-end crosstalk cancellation on RFSoC platform," IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), June. 2024. (accepted for publication)
W. Kwon, H. Won, T. Kim, S. Jeon, S.-W. Kwon, H.-I. Song, H. Choi, B. Kim, H. Jin, J.-G. Jo, W. Han, T.-Y. Kim, G. Kim, J. Eu, J. Park, H.-M. Bae, "A 26Gb/s framed-pulse width modulation transceiver for extended reach optical links," IEEE Journal of Solid-State Circuits (JSSC), Feb. 2024.
J. Lee, S. Jang, Y. Choi, D. Kim, S. Yonar, M. Braendli, A. Ruffino, T. Morf, M. Kossel, P.-A. Francese, G. Kim, "A DAC/ADC-based wireline transceiver datapath functional verification on RFSoC platform," IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 71, no. 7, pp. 3318-3322, Feb. 2024.
M. Lee, J. Cho, J. Choi, W. Choi, J. Lee, I. Jang, C. Moon, G. Kim, B. Kim, "Compact single-ended transceivers demonstrating flexible generation of 1/N-rate receiver front-ends for short-reach links," IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 71, no. 1, pp. 373-382, Jan. 2024.
2023
A.-S. Yonar, P.-A. Francese, M. Braendli, M. Kossel, M. Prathapan, T. Morf, A. Ruffino, G. Kim, T. Jang, "An 8b 1.0-to-1.25GS/s time-based ADC with bipolar VTC and sense amplifier latch interpolated gated ring oscillator TDC," IEEE Solid-State Circuits Letters (SSCL), vol. 6, pp. 193-196, Jul. 2023.
G. Kim, "Far-end crosstalk cancellation with MIMO OFDM for >200 Gb/s ADC-based serial links," IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), Jan. 2023.
2022
G. Kim, "Design space exploration of single-lane OFDM-based serial links for high-speed wireline communications," IEEE Open Journal of Circuits and Systems (OJCAS), vol. 3, pp. 134-146, Jul. 2022.
2020
G. Kim, L. Kull, D. Luu, M. Braendli, C. Menolfi, P.-A. Francese, H. Yueksel, C. Aprile, T. Morf, M. Kossel, A. Cevrero, I. Ozkaya, A. Burg, T. Toifl and Y. Leblebici, "A 161mW 56Gb/s ADC-based discrete multitone wireline receiver data-path in 14nm FinFET," IEEE Journal of Solid-State Circuits (JSSC), vol. 55, no. 1, pp. 38-48, Jan. 2020.
Before 2019
G. Kim, C. Cao, K. Gharibdoust, A. Tajalli, and Y. Leblebici, "A time-division multiplexing signaling scheme for inter-symbol/channel interference reduction in low-power multi-drop memory links," IEEE Transactions on Circuits and Systems II: Regular papers (TCAS-II), vol. 64, no. 12, pp. 1387-1391, December 2017.
G. Kim, T. Barailler, C. Cao, K. Gharibdoust and Y. Leblebici, "Design and modeling of serial data transceiver architecture by employing multi-tone single-sideband signaling scheme," IEEE Transactions on Circuits and Systems I: Regular papers (TCAS-I), vol. 64, no. 12, pp. 3192-3201, December 2017.
G. Kim, K. Gharibdoust, A. Tajalli and Y. Leblebici, "A digital spectrum shaping signaling serial-data transceiver with crosstalk and ISI reduction property in multi-drop interfaces," IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 63, no. 12, pp. 1126-1130, December 2016.
X. Tang, G. Kim, P.-E. Gaillardon and G. De Micheli, "A study on the programming structures for RRAM-based FPGA architectures," IEEE Transactions on Circuits and Systems I: Regular papers (TCAS-I), vol. 63, no. 10, pp. 503-516, April 2016.
P.-E. Gaillardon, X. Tang, G. Kim and G. De Micheli, "A novel FPGA architecture based on ultra-fine grain reconfigurable logic cells," IEEE Transactions on Very Large Scale Integration (TVLSI) Systems, vol. 23, no. 10, pp. 2187-2197, October 2015.
Selected Conference Proceedings
2024
S. Jang, J. Lee, Y. Choi, D. Kim, G. Kim, "A Discrete Multitone Wireline Transceiver With Clipping Ratio Optimization For ADC-Based High-Speed Serial Links," 21st International SoC Design Conference (ISOCC 2024), Sapporo, Japan, August 19-22, 2024.
J. Lee, S. Jang, D. Kim, Y. Choi, S. Song, G. Kim, "A Discrete Multitone Wireline Transceiver Using Optimal Loading Over Reflective Channel For ADC-Based High-Speed Serial Links," 21st International SoC Design Conference (ISOCC 2024), Sapporo, Japan, August 19-22, 2024.
S. Lee, T. Seol, G. Kim, M. Song, G. Kim, J.-H. Yoon, A.-K. George, J. Lee, "A 97dB-PSRR 178.4dB-FOMDR calibration-free VCOΔΣ ADC using a PVT-insensitive frequency locked differential regulation scheme for multi-channel ExG acquisition," 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI), Jun. 2024.
S. Jang, J. Lee, Y. Choi, D. Kim, G. Kim, "DMT 3L4W: a 3-lane 4-wire signaling with discrete multitone modulation for high-speed wireline chip-to-chip interconnects," 2024 International Symposium on Circuits and Systems (ISCAS 2024), Singapore, May 19-22, 2024.
J. Lee, S. Jang, Y. Choi, D. Kim, M. Braendli, M. Kossel, A. Ruffino, T. Morf, P.-A. Francese, G. Kim, "A 4x4 MIMO discrete multitone wireline transceiver with far-end crosstalk cancellation for ADC-based high-speed serial links," 2024 International Symposium on Circuits and Systems (ISCAS 2024), Singapore, May 19-22, 2024.
J. Lee, D.-G. Choi, M. Song, G. Kim, J.-H. Yoon, "BEE-SLAM: a 65nm 17.96 TOPS/W 97.55%-sparse-activity hybrid mixed-signal/digital multi-agent neuromorphic SLAM accelerator for swarm robotics," 2024 Custom Integrated Circuits Conference (CICC), Denver, Apr., 2024.
S. Jang, J. Lee, G. Kim, "A study on the effects of power loading profile in discrete multitone wireline serial-data transceiver with fixed-point DSP-SerDes simulator," 2024 International Conference on Electronics, Information, and Communication (ICEIC 2024), Taipei, Taiwan, Jan. 28-31, 2024.
Y. Choi, S. Jang, G. Kim, "Area optimization of the feed-forward equalizer for ADC-based high-speed wireline receiver using channel characteristics," 2024 International Conference on Electronics, Information, and Communication (ICEIC 2024), Taipei, Taiwan, Jan. 28-31, 2024.
2023
H. Choi, H.-I. Song, H. Won, J. Woo, W. Kwon, H. Jin, K. Kwon, C. Lee, G. Kim, J. Eu, S. Park, H.-M. Bae, "An 86.71875GHz RF transceiver for 57.8125Gb/s waveguide links with a CDR-assisted carrier synchronization loop in 28nm," 2023 European Solid-State Circuits Conference (ESSCIRC 2023), Lisbon, Portugal, September 11-14, 2023.
G. Kim, S. Lee, T. Seol, S. Baik, Y. Shin, G. Kim, J-H. Yoon, A-K. George, J. Lee, "A 1V-supply 1.85Vpp-input-range 1kHz-BW 181.9dB-FOMDR 179.4dB-FoMSNDR 2nd-order noise-shaping SAR-ADC with enhanced input impedance in 0.18um CMOS," 2023 International Solid-State Circuits Conference (ISSCC 2023), San-Francisco, California, USA, February 19-23, 2023.
2022
J. Park, J. Lee, G. Kim, and H.-M. Bae, "Bin-specific quantization in spectral-domain convolutional neural network accelerators," IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2022), Incheon, South Korea, June 13-15, 2022.
2021
J. Lee*, G. Kim*, J. Park and H.-M. Bae, "Link bit-error rate requirement analysis for deep neural network accelerators," IEEE International Symposium on Circuits and Systems (ISCAS 2021), Daegu, South Korea, May 22-28, 2021. (*Both authors contributed equally to this work)
2019
G. Kim, L. Kull, D. Luu, M. Braendli, C. Menolfi, P.-A. Francese, H. Yueksel, C. Aprile, T. Morf, M. Kossel, A. Cevrero, I. Ozkaya, H. Bae, A. Burg, T. Toifl and Y. Leblebici, "A 4.8pJ/b 56Gb/s ADC-based PAM-4 wireline receiver data-path with cyclic prefix in 14nm FinFET," 2019 Asian Solid-State Circuits Conference (ASSCC 2019), Macao, China, November 4-6, 2019.
G. Kim, Woohyun Kwon, Thomas Toifl, Yusuf Leblebici, Hyeon-Min Bae, "Design considerations and performance trade-offs for 56Gb/s discrete multi-tone electrical link," 62nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2019), Dallas, TX, USA, August 4-7, 2019.
G. Kim, L. Kull, D. Luu, M. Braendli, C. Menolfi, P.-A. Francese, H. Yueksel, C. Aprile, T. Morf, M. Kossel, A. Cevrero, I. Ozkaya, A. Burg, T. Toifl and Y. Leblebici, "A 161mW 56Gb/s ADC-based discrete multitone wireline receiver data-path in 14nm FinFET," 2019 International Solid-State Circuits Conference (ISSCC 2019), San-Francisco, California, USA, February 17-21, 2019.
Before 2019
G. Kim, L. Kull, D. Luu, M. Braendli, C. Menolfi, P.-A. Francese, H. Yueksel, C. Aprile, T. Morf, M. Kossel, A. Cevrero, I. Ozkaya, T. Toifl and Y. Leblebici, "Parallel implementation technique of digital equalizer for ultra-high-speed wireline receiver," IEEE International Symposium on Circuits and Systems (ISCAS 2018), Florence, Italy, May 27-30, 2018.