Circuits And Systems for Signal Processing (CASSP) Laboratory
다음의 연구 주제에 관심이 있는 학생 (undergraduate, intern, graduate, postdoc)은 간단한 자기소개 및 성적표를 첨부하여 gain.kim@dgist.ac.kr로 이메일을 주시기 바랍니다.
반도체 칩 설계 (아날로그, 디지털)
차세대 유/무선 통신을 위한 초고속 analog-digital converter (ADC) 회로(칩)설계
차세대 유/무선 통신을 위한 초고속 digital signal processor (DSP) 회로(칩)설계
Chiplet 및 multi-chip module을 위한 반도체 칩간 광대역 인터페이스 송수신기 회로(칩)설계
FPGA / Programmable SoC 기반 시스템 설계
데이터센터 내의 서버간 네트워킹 시스템을 위한 FPGA를 활용한 디지털 시스템 설계
Programmable system-on-chip 을 활용한 아날로그-혼성회로 칩의 실시한 애뮬레이션 시스템 설계
Mixed-signal circuit design
High-speed serial link (SerDes) for wireline communications
>112Gb/s ADC-based wireline transceivers
Clock-data recovery circuits
High-speed mid-resolution analog-digital converter (ADC)
High-level SerDes modeling & simulation
Digital signal processor for >200Gb/s ultra high-speed wireline transceivers
Energy-efficient equalization techniques
Error-resilient modulation scheme for domain-specific communication systems
All-digital background ADC calibration
Energy-efficient digital VLSI design
Statistics-based digital design
Finding optimal digital data path structure with application-specific signal characteristics
NEWS
Apr. / 25 / 2024: 한국연구재단 우수신진연구 과제 선정 (PI, 2024.04~2027.03).
Apr. / 25 / 2024: 산업통상자원부 첨단시스템반도체디자인플랫폼기술개발사업 과제 선정 (co-PI, 2024.04~2028.12).
Jan. / 30 / 2024: The paper "A DAC/ADC-based Wireline Transceiver Datapath Functional Verification on RFSoC Platform" was accepted by the IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II).
Jan. / 16 / 2024: Two papers are accepted to be presented at ISCAS 2024.
Nov. / 21 / 2023: Two papers are accepted to be presented at ICEIC 2024.
Sept. / 15 / 2023: 송은기 학생 제 24회 대한민국 반도체설계대전 기업특별상 수상 (출품작: 56GS/s 64-way 8-bit time-interleaved shared charge-injection cell-based SAR ADC modeling with Xmodel).
Apr. / 13 / 2023: SK Hynix newsroom technical column posting (국문 링크: Link, English version: Link).
Apr. / 07 / 2023: 삼성미래기술육성사업 과제 선정 (2023.06~2028.05).
Dec. / 07 / 2022: 최유진 학생 "IEEE Circuits and Systems Society (CASS) 우수논문상" 수상 (반도체공학회 종합학술대회).
Oct. / 14 / 2022: Gain Kim was awarded the "2022 Excellent Young Researcher in Integrated Circuit Design" by IC Design Education Center (IDEC).
Sept. / 06 / 2022: The paper "Far-End Crosstalk Cancellation With MIMO OFDM for >200 Gb/s ADC-Based Serial Links " was accepted by the IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II).
Jul. / 06 / 2022: The paper "Design Space Exploration of Single-Lane OFDM-Based Serial Links for High-Speed Wireline Communications" was accepted by the IEEE Open Journal of Circuits and Systems (OJCAS).
May / 03 / 2022: The Joint Study Agreement (JSA) with IBM Zurich Research Laboratory for an ultra-high-bandwidth SerDes project is cleared.
Apr. / 26 / 2022: 삼성전자 DS부문 산학과제 선정 (ADC기반 고속 SerDes) (2022.05 ~ 2025.04)
Mar. / 27 / 2022: The paper "Bin-Specific Quantization in Spectral-Domain Convolutional Neural Network Accelerators" was accepted by the 2022 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS).
Feb. / 22 / 2022: Gain Kim will give a tutorial at the CICC 2022 educational session (high-speed link design, April 24, 2022) on the equalization, architecture, and circuit design for high-speed serial link receivers.
Nov. / 18 / 2021: Gain Kim will give a talk at the forum session (session title: paving the way to 200Gb/s transceivers) of the International Solid-State Circuits Conference (ISSCC) 2022 to discuss the modulations, design opportunities and challenges for enabling 200Gb/s/lane wireline communications beyond PAM-4.
Nov. / 17 / 2021: The first page of the CASSP website is created!
Industrial Research Partners & Sponsors
IBM Research Zurich Laboratory (2022.05~)
Samsung Electronics Foundry Division (2022.05~)
Point2 Technology (2022.07~)
Scientific Analog (2022.09~)
Samsung Advanced Institute of Technology (SAIT) (2023.02~)
Samsung Future Technology Foundation (삼성전자 미래기술육성센터) (2023.06~)