Circuits And Systems for Signal Processing (CASSP) Laboratory

반도체 칩 설계 (아날로그, 디지털)

• 차세대 고속 유선 인터페이스를 위한 초고속 analog-digital converter (ADC) 회로(칩)설계

• 차세대 고속 유선 인터페이스를 위한 초고속 digital signal processor (DSP) 회로(칩)설계

• Chiplet 및 multi-chip module을 위한 반도체 칩간 광대역 인터페이스 송수신기 회로(칩)설계

FPGA / Programmable SoC 기반 시스템 설계

• 데이터센터 내의 서버간 네트워킹 시스템을 위한 FPGA를 활용한 디지털 시스템 설계

• Programmable system-on-chip 을 활용한 아날로그-혼성회로 칩의 실시간 애뮬레이션 시스템 설계

NEWS

2025

Aug. / 29 / 2025: Our Ph.D. student, Seoyoung Jang, has been selected as a Next-Generation Engineering Researcher (차세대 공학연구자) by the Institute for Promotion of Engineering and Science of Korea (한국이공학진흥원).

Aug. / 28 / 2025: 장서영, 최유진 박사과정 학생 - 한국연구재단 이공분야 학술연구지원사업 (박사과정생 연구장려금) 선정. 

Aug. / 28 / 2025: 강가영, 최윤지, 박우정 석사과정 학생 - 한국연구재단 이공분야 학술연구지원사업 (석사과정생 연구장려금) 선정. 

Aug. / 27 / 2025: Prof. Gain Kim starts serving as a member of the Technical Program Committee (Wireline Subcommittee) for the IEEE Custom Integrated Circuits Conference (CICC).

Aug. / 21 / 2025: 공민성 석사과정 학생 LX세미콘 산학장학생 선정.

May. / 29 / 2025: Our paper entitled "A 144mW 76Gb/s DAC-Based Discrete Multitone Wireline Transmitter in 5nm FinFET" has been accepted by the 2025 European Solid-State Electronics Research Conference (ESSERC).

May. / 20 / 2025: Our paper entitled "A Spectral-Efficient Low-Power NRZ/PAM-4 Dual-Mode Wireline Transmitter for Multidrop Interfaces" has been accepted as a regular paper by the 2025 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

Mar. / 09 / 2025: Our paper entitled "A 2-Lane DAC/ADC-Based 2x2 MIMO PAM-4 MMSE-DFE Wireline Transceiver With FEXT Cancellation On RFSoC Platform" has been accepted for publication by the IEEE Transactions on Very Large Scale Integration Systems (TVLSI).

Apr. / 23 / 2025: Our Ph.D. student, Zhongpeng Liang, has been selected as a recipient of the Yoo Il-han scholarship (유일한 장학생) supported by Yuhan foundation. Congratulations to Liang!

Jan. / 31 / 2025: Prof. Gain Kim will serve as the Publication Chair at the 2025 Asian Solid-State Circuits Conference (A-SSCC).

2024

Dec. / 31 / 2024: 장서영 박사과정생 대학원 해외파견 연구장학생(DPRAA) 선정 (스위스 ETH Zurich / IBM Research Europe-Zurich 공동연구).

Dec. / 20 / 2024: 김동건 박사과정생 대학원 우수학생상 수상.

Nov. / 18 / 2024: Our paper "Recent Advances in Ultra-High-Speed Wireline Receivers With ADC-DSP-Based Equalizers" was accepted by the IEEE Open Journal of the Solid-State Circuits Society (OJ-SSCS).

Nov. / 07 / 2024: Research conducted by Seoyoung Jang et al., "A DAC-Based Discrete Multitone Wireline Transmitter in 5nm FinFET" has been accepted to be presented at the 2025 International Solid-State Circuits Conference (ISSCC 2025) Student Research Preview (SRP) session.

Oct. / 10 / 2024: Research conducted by Jaewon Lee et al., "A 353mW 112Gb/s Discrete Multitone Wireline Receiver Datapath With Time-Based ADC in 5nm FinFET" has been accepted to be presented at the 2025 International Solid-State Circuits Conference (ISSCC 2025) as a regular paper.

Aug. / 20 / 2024: The paper "A Discrete Multitone Wireline Transceiver Datapath With On-Chip Sign-Sign LMS Adaptation And Loading Profile Optimization On RFSoC" was accepted by the IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II).

Jul. / 23 / 2024: The paper "A Loop-Break Decision Feedback Equalizer for DAC/ADC-DSP-based Wireline Transceivers" was accepted by the IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I).

Jul. / 01 / 2024: DGIST - IBM Research Europe Zurich Lab 국제공동연구 과제 선정 (DGIST 내부과제) (PI, 2024.07~2026.12). 

Jun. / 04 / 2024: The paper "A 2-Lane Discrete Multitone Wireline Receiver Datapath With Far-End Crosstalk Cancellation On RFSoC Platform" was accepted by the IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II).

May. / 29 / 2024: Two papers are accepted to be presented at ISOCC 2024.

May. / 07 / 2024: Seoyoung Jang was awarded the "2024 IEEE Circuits and Systems Student Travel Grant".

Apr. / 25 / 2024: 한국연구재단 우수신진연구 과제 선정 (PI, 2024.04~2027.03). 

Apr. / 25 / 2024: 산업통상자원부 첨단시스템반도체디자인플랫폼기술개발사업 과제 선정 (co-PI, 2024.04~2028.12). 

Jan. / 30 / 2024: The paper "A DAC/ADC-based Wireline Transceiver Datapath Functional Verification on RFSoC Platform" was accepted by the IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II).

Jan. / 16 / 2024: Two papers are accepted to be presented at ISCAS 2024.

2023

Nov. / 21 / 2023: Two papers are accepted to be presented at ICEIC 2024.

Sept. / 15 / 2023: 송은기 학생 제 24회 대한민국 반도체설계대전 기업특별상 수상 (출품작:  56GS/s 64-way 8-bit time-interleaved shared charge-injection cell-based SAR ADC modeling with Xmodel).

Apr. / 13 / 2023: SK Hynix newsroom technical column posting (국문 링크: Link, English version: Link).

Apr. / 07 / 2023: 삼성미래기술육성사업 과제 선정 (2023.06~2028.05). 

2022

Dec. / 07 / 2022: 최유진 학생 "IEEE Circuits and Systems Society (CASS) 우수논문상" 수상 (반도체공학회 종합학술대회). 

Oct. / 14 / 2022: Gain Kim was awarded the "2022 Excellent Young Researcher in Integrated Circuit Design" by IC Design Education Center (IDEC).

Sept. / 06 / 2022: The paper "Far-End Crosstalk Cancellation With MIMO OFDM for >200 Gb/s ADC-Based Serial Links " was accepted by the IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II).

Jul. / 06 / 2022: The paper "Design Space Exploration of Single-Lane OFDM-Based Serial Links for High-Speed Wireline Communications" was accepted by the IEEE Open Journal of Circuits and Systems (OJCAS).

May / 03 / 2022:  The Joint Study Agreement (JSA) with IBM Zurich Research Laboratory for an ultra-high-bandwidth SerDes project is cleared. 

Apr. / 26 / 2022:  삼성전자 DS부문 산학과제 선정 (ADC기반 고속 SerDes) (2022.05 ~ 2025.04)

Mar. / 27 / 2022: The paper "Bin-Specific Quantization in Spectral-Domain Convolutional Neural Network Accelerators" was accepted by the 2022 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS).

Feb. / 22 / 2022: Gain Kim will give a tutorial at the CICC 2022 educational session (high-speed link design, April 24, 2022) on the equalization, architecture, and circuit design for high-speed serial link receivers. 

2021

Nov. / 18 / 2021: Gain Kim will give a talk at the forum session (session title: paving the way to 200Gb/s transceivers) of the International Solid-State Circuits Conference (ISSCC) 2022 to discuss the modulations, design opportunities and challenges for enabling 200Gb/s/lane wireline communications beyond PAM-4.

Nov. / 17 / 2021: The first page of the CASSP website is created!