MEMBER
Jiwon Kim
Contact Information
Current Affiliation: Memory Business, Samsung Electronics
Email : jiwonkim[at]postech.ac.kr
Educational Backgrounds
[2021/02~2023/02] M.S. in Electrical Engineering, POSTECH, Pohang, Korea
[2017/03~2021/02] B.S. in Electronic Engineering, Sookmyung Women's University, Seoul, Korea
Professional Experiences
[2023/02~Present] Engineer, Memory Business, Samsung Electronics, Hwasung, Korea
[2023/01~2023/02] Intern, Memory Business, Samsung Electronics, Hwasung, Korea
[2021/02~2023/02] Research Assistant, Dept. Electrical Engineering, POSTECH, Pohang, Korea
Research Interests
Intelligent Mobile System-on-Chip
HW/SW Co-design
ASIC/FPGA Implementation
5G Communication systems
Publications (with EPIC LAB)
International Conference Proceedings
Jiwon Kim, Seungsik Moon, and Youngjoo Lee*, "Low-complexity phase shift design for IRS-aided SU-MIMO wireless systems," International SoC Design Conference (ISOCC), JeJu, Korea, Oct. 2023.
Jiwon Kim, Seungsik Moon, and Youngjoo Lee*, "Hardware analysis of channel estimation method for IRS-aided MIMO wireless systems," International SoC Design Conference (ISOCC), Gangneung, Korea, Oct. 2022. (ETRI Award)
Awards and Honors
ETRI Award, International SoC Design Conference (ISOCC), 2022.