Embedded Processor & Intelligent Computing (EPIC) Lab is a research group at the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, jointly affiliated with the School of Electrical Engineering and the Department of AI Systems. EPIC Lab develops efficient hardware-software building blocks for application-specific embedded processors, with a focus on intelligent computing across a broad range of emerging workloads.
Our research spans cross-disciplinary topics including algorithms, computer architectures, and system-on-chip (SoC) designs. We currently focus on energy-efficient processors for compressed machine learning models, high-performance baseband processors for next-generation communication systems, and emerging IoT platforms for human-centric applications.
[2026/11] Our paper entitled "TwinHash: Two-sided object identity management for time- and energy-efficient agentic workflows" has been accepted for presentation at the 33rd IEEE International Symposium on High-Performance Computer Architecture (HPCA 2027).
[2026/09] Our paper entitled "CHASE-VLA: Post-training quantization framework for vision-language-action models with chunk-aware scale estimation" has been accepted for presentation at the 18th Asian Conference on Computer Vision (ACCV 2026).
[2026/08] Our paper entitled "A 14.4-Gb/s 7.3-pJ/b universal vision transformer OFDM channel estimation processor for B5G/6G communication systems" has been accepted for publication in the IEEE Transactions on Circuits and Systems I: Regular Papers.
[2026/07] Our paper entitled "ReSpec: Retrieval-guided speculative decoding for long-context LLM inference" has been accepted for presentation at the 2026 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2026).
[2026/07] Our paper entitled "Parameterized MAC IP generator for extremely low-precision floating-point arithmetic on FPGAs" has been accepted for presentation at the 2026 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2026).
[2026/06] Our paper enetitled "Retention-resilient ECRAM-PIM training system with device-algorithm-controller co-design" has been accepted for publication in the IEEE Transactions on Circuits and Systems I: Regular Papers.