Joonhwan Yi (이준환)
Joonhwan is a faculty member of the School of Semiconductor Systems Engineering at Kwangwoon University, Seoul, South Korea. Prior to joining Kwangwoon University, he led a system-on-a-chip (SoC) architecture design team at Samsung Electronics for mobile modem SoCs. The team developed high level models of digital systems in C++ or SystemC so that the functional simulation can be done thousands of times faster than the one at register transfer level (RTL). He invented a high-level power modeling method and incorporated Baum Design Systems (www.baum-ds.com).
He has a B.S. degree in Electronic Engineering from Yonsei University, Seoul, Korea in 1991 and M.S. and Ph.D degrees in Electrical Engineering and Computer Science from University of Michigan, Ann Arbor, Michigan, USA, in 1998 and 2002, respectively. His Ph.D research was on high level function and delay testing for digital circuits. During his Ph.D study, he worked for Cisco Systems, CA, USA as a summer intern and developed a path delay testing methodologies for VLSI circuits. Right after B.S. degree, Joonhwan joined Samsung and developed application specific integrated circuit (ASIC) cell libraries.
School of Semiconductor Systems Engineering , Kwangwoon University
Email: joonhwan.yi@kw.ac.kr