Embedded Files
Conference & Journal Papers
Conference & Journal Papers
PoP-ECC: Robust and Flexible Error Correction against Multi-Bit Upsets in DNN Accelerators (2025). Proceedings of the Design Automation Conference (DAC).
TLDR: Improve the reliability of SRAM, resulting in improved DNN reliability against varying Bit Error Ratio (BER) and Double-Adjacent Error (DAE) ratio.
Taewon Park, Saeid Gorgin, Dongwhee Kim, Jaeho Shin, Michael B. Sullivan, and Jungrae Kim
SELCC: Enhancing MLC Reliability and Endurance with Single-cell Error Correction Codes (2024). Proceedings of the Design, Automation & Test in Europe Conference & Exhibition (DATE). Best Paper Award
TLDR: Improve Storage Class Memory's reliability and endurance without additional redundancy and comparable overheads.
Yujin Lim, Dongwhee Kim, and Jungrae Kim
Agile-DRAM: Agile Trade-Offs in Memory Capacity, Latency, and Energy for Data Centers (2024). Proceedings of the International Symposium on High Performance Computer Architecture (HPCA).
TLDR: Improve DRAM access latency and refresh overheads in data centers with under-utilized memory capacity.
Jaeyoon Lee, Wonyeong Jung, Dongwhee Kim, Daero Kim, Junseung Lee, and Jungrae Kim
Unity ECC: Unified Memory Protection Against Bit and Chip Errors (2023). Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis (SC). Best Student Paper Finalist, Invited to SAIF 2023
TLDR: Improve System performance, DRAM energy consumption, and DRAM chip size by eliminating OD-ECC.
Dongwhee Kim, Jaeyoon Lee, Wonyeong Jung, Michael Sullivan, and Jungrae Kim
[Paper] [Slides] [Poster (SAIF 2023)] [GitHub] [BibTex] [NVIDIA Research]
Synergistic Integration: An Optimal Combination of On-Die and Rank-Level ECC for Enhanced Reliability (2023). Proceedings of the International SoC Design Conference (ISOCC).
TLDR: Find the optimal combination of the OD-ECC and RL-ECC to improve system reliability.
Wonyeong Jung, Dongwhee Kim, and Jungrae KimĀ
SCC: Efficient Error Correction Codes for MLC PCM (2023). Proceedings of the International SoC Design Conference (ISOCC).
TLDR: Improve Phase Change Memory (PCM) reliability by correcting resistant drift errors and cell wear-outs without additional redundancy.
Yujin Lim, Dongwhee Kim, and Jungrae Kim
EPA ECC: Error-Pattern-Aligned ECC for HBM2E (2023). Proceedings of the International Technical Conference on Circuits/Systems, Computers, and Communications (ITC-CSCC).
TLDR: Improve HBM memory reliability by employing soft error-pattern-aligned On-Die ECC (OD-ECC).
Kiheon Kwon, Dongwhee Kim, Soyoung Park, and Jungrae Kim
DNN Retraining Method Reducing Accuracy Degradation in Packet-Lossy Environments (2023). Journal of Korean Institute of Information Scientists and Engineers (JOK).
TLDR: Design error-robust deep neural networks for unreliable communication environments.
Dongwhee Kim*, Yujin Lim*, Syngha Han, and Jungrae Kim (* equal contributions)
YOCO: Unified and Efficient Memory Protection for High Bandwidth Memory (2022). Proceedings of the International SoC Design Conference (ISOCC).
TLDR: Maximize yield with minimal protection overhead.
Dongwhee Kim and Jungrae Kim
Patents
Patents
METHOD AND APPARATUS FOR GENERATING CODE FOR SINGLE SYMBOL ERROR CORRECTION AND DOUBLE ERROR CORRECTION (2024). KR Patent 10-2656075.
Jungrae Kim and Dongwhee Kim
[Patent]
Abstract
The present invention relates to the code generation technology for the bit error correction among the single symbol bug fixing of the error-correction code formation apparatus and this, and in the parity check matrix of the reed Solomon (Reed-Solomon) error-correction code which is not shortened, the syndrome in which the step: step: syndrome coming through the above-mentioned shortened parity check matrix comes through the single symbol error, the step of confronting among this in case of the bit error (double bit error) and altogether inspecting whether it is not 0 and it is unique or not and above-mentioned shortened parity check matrix of producing the parity check matrix performing the syndrome inspection about the error-correction code based on heat and is shortened of extracting the heat corresponding to the symbol number of the coding word (code word) of the number may include the single symbol error, the single symbol bug fixing confronting among this in case of the bit error and altogether corresponds to the bit number of the above-mentioned shortened parity check matrix if it is not 0 and it is unique and the step of producing the parity check matrix for the bit error correction among this.
CODE GENERATION METHOD, ERROR CORRECTION CODE GENERATION APPARATUS, AND STORAGE MEDIUM STORING INSTRUCTIONS TO PERFORM CODE GENERATION METHOD (2023). US Patent 18/506,336 (Pending).
Jungrae Kim and Dongwhee Kim
Abstract
There is provided a code generation method. The method comprises extracting columns corresponding to the number of symbols of a codeword from a parity check matrix of an error correction code; generating a shortened parity check matrix for the error correction code on the basis of the columns corresponding to the number of symbols of the codeword; checking whether the shortened parity check matrix includes an independent nonzero syndrome for each of a single symbol error and a double error; and generating a parity check matrix for a correction of the single symbol error corresponding to the number of bits of the shortened parity check matrix and a correction of the double error corresponding to the number of bits of the shortened parity check matrix if the shortened parity check matrix includes the independent nonzero syndrome for each of the single symbol error and the double error.
Educational Resource
Educational Resource
ECC-ExerSim (Error-Correcting Code Exercise and Simulator) (2023). Korea Copyright Commission (No. C-2023-043210).
Jungrae Kim, Dongwhee Kim, and Taewon Park
[GitHub]
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