Research

Intelligent decisions for semiconductor manufacturing

Semiconductor manufacturing produces rich process data, but useful decisions require more than accurate predictions. Models must account for changing equipment conditions, limited measurements, operating constraints, and the consequences of an incorrect recommendation.

Virtual Metrology & Process Decisions

How can process data support decisions when measurements are delayed or sparse?

I develop virtual-metrology and digital-twin methods that estimate product quality, quantify uncertainty, and support process optimization. Inverse virtual metrology extends this work to feasible recipe candidates for a desired process correction.

Methods: deep feature extraction, Gaussian processes, few-shot adaptation, inverse modeling, and multi-objective optimization.

Equipment Health & Manufacturing Reliability

How can models remain useful as equipment ages or changes after maintenance?

My research studies predictive maintenance, process drift, and representations that separate tool conditions from recipe effects. These methods support equipment-health assessment, post-maintenance recovery, and recipe migration.

Methods: time-series learning, health indicators, latent-state decomposition, and uncertainty-aware decision support.

The overview below connects virtual metrology, evidence-guided root-cause analysis and predictive maintenance with decisions about process quality, equipment condition and manufacturing reliability.

Adaptive Reinforcement Learning–Driven Digital Twin

How can a digital twin learn better process settings and adapt across machines?

The ADEPT framework connects product and machine digital twins with adaptive reinforcement learning. Process data and metrology update quality predictions and Gaussian-process uncertainty, which guide the exploration of candidate recipe settings. Multi-objective optimization balances competing quality targets, while dynamic feature updates address process drift and meta-learning and transfer learning support adaptation to additional machines.

Conceptual loop: process data → digital-twin predictions and uncertainty → adaptive learning → candidate settings and validation → updated process feedback.

C.-Y. Lin, T.-L. Tseng, and T.-H. Tsai. Adaptive Reinforcement Learning-Driven Digital Twin for Multiobjective and Multimachine Process Optimization. IEEE Transactions on Artificial Intelligence, vol. 7, no. 8, pp. 4291–4310, 2026.

AI-Guided Recipe Recommendation

Given a desired quality target, which recipe corrections are feasible and worth considering?

A target-conditioned inverse model generates multiple recipe corrections from the current process state. Candidates are screened against engineering rules and historical support, then a forward verifier estimates their quality outcomes and confidence. Ranking also considers adjustment cost and candidate diversity, producing a Top-K shortlist for engineer review or guarded application. If no candidate qualifies, the system abstains and escalates the decision for review.

Conceptual workflow: current state and target → candidate generation → feasibility screening → forward verification and ranking → Top-K recipe choices.

C.-Y. Lin, A. d. O. Barros, S. H. Emon, and T.-L. Tseng. Feasibility-Aware Inverse Virtual Metrology for Top-K Recipe Recommendation in Semiconductor Process Correction. IEEE Transactions on Automation Science and Engineering, vol. 23, pp. 13445–13468, 2026.

Generative AI

How can manufacturing models learn from limited measurements and adapt as conditions change?

Pre-trained models and few-shot adaptation. GFA-VM learns sensor representations with a generative foundation model, then predicts wafer quality and uncertainty. Uncertain cases are selected for physical measurement; a small set of new labels supports rapid model adaptation, while the sampling threshold is adjusted as conditions change.

Large Pre-Trained Models and Few-Shot Fine-Tuning for Virtual Metrology: A Framework for Uncertainty-Driven Adaptive Process Control in Semiconductor Manufacturing · IEEE Transactions on Automation Science and Engineering, 2025.

Targeted data augmentation. MSC-DGA focuses synthetic-data generation on sparse or uncertain operating conditions. A VAE and normalizing flow organize the latent representation; constrained diffusion generates candidate samples. Statistical and engineering checks screen these candidates before accepted synthetic data are combined with real observations for model training.

Generative AI-Driven Data Augmentation for Robust Virtual Metrology: GANs, VAEs, and Diffusion Models · IEEE Transactions on Semiconductor Manufacturing, 2025.

Industrial Time Series

How can a forecasting model reuse useful temporal patterns across different domains?

GeMeR-TS encodes a historical sequence and generates a retrieval query for an internal, trainable prototype memory. Cross-attention retrieves relevant temporal context, which conditions a mixture of expert models and the multi-step forecast. Retrieval, expert routing and prediction are trained jointly, without an external nearest-neighbor index.

The study evaluates cross-domain forecasting on public electricity, traffic, weather, exchange-rate and transformer-temperature benchmarks. This general forecasting methodology complements my broader research on industrial time-series learning.

GeMeR-TS: Generative Memory-Based Retrieval and Mixture-of-Experts for Cross-Domain Time-Series Forecasting · IEEE Transactions on Big Data, 2026.

Intelligent Fab Operations & Yield Improvement

How can AI help engineers access manufacturing knowledge and investigate process problems?

My work connects manufacturing analytics with scheduling, yield analysis, root-cause inference and high-dimensional variable selection, accounting for operating constraints and factory objectives.

Manufacturing virtual assistants. This research explores generative AI as an interface for manufacturing information and engineering guidance in the semiconductor industry.

Generative AI for Intelligent Manufacturing Virtual Assistants in the Semiconductor Industry · IEEE Robotics and Automation Letters, 2025.

Explainable root-cause analysis. CLARiC combines contrastive representations of normal and anomalous operating conditions with causal inference. It examines candidate process factors while accounting for confounders, then uses counterfactual analysis and intervention validation to assess which changes are worth pursuing. The aim is to connect diagnostic evidence with engineering action.

CLARiC: Contrastive Learning and Root-Cause Inference With Causality for Explainable Smart Manufacturing · IEEE Access, 2025.

Dynamic Fab Scheduling

How can dispatching decisions respond to disruptions while balancing competing fab objectives?

PH-MORL separates scheduling into two decision levels. A high-level policy consults a Pareto archive of non-dominated trade-offs and evaluates whether global objective preferences should change. A low-level policy uses the committed preferences to dispatch eligible lots under tool-qualification, batching and setup constraints. Fab-state and performance feedback connect the two levels as machine failures, rush orders and workload changes occur.

The study uses discrete-event simulation of wafer-fab operations, with the EPI tool group as the representative low-level control focus. It evaluates local dispatch decisions together with their implications for fab-wide throughput, cycle time, yield and energy.

Two-Level Pareto-Based Hierarchical Reinforcement Learning for Dynamic Multi-Objective Scheduling in Semiconductor Fabs · IEEE Transactions on Semiconductor Manufacturing, 2026.

AI for Supply Chain Decisions

How can emerging supplier risks be translated into adaptive sourcing decisions?

The i-SUP framework combines GPT-based extraction of textual risk signals with Bayesian decision modeling. Bayesian best–worst weighting captures uncertainty in expert priorities, while a Bayesian belief network updates disruption probabilities as evidence changes. Reinforcement learning supports short-horizon order allocation, and NSGA-II develops longer-horizon contract alternatives.

The two planning levels coordinate sourcing choices across cost, delivery risk and environmental, social and governance (ESG) objectives. This research connects semiconductor supply-chain information with decisions about which suppliers to use, how to allocate orders and how to adjust plans under changing conditions.

GPT-Augmented Bayesian Reinforcement Learning Framework for Multiobjective Supplier Selection · IEEE Transactions on Engineering Management, 2025.

International Education & Industry Engagement

I contribute to the development of the UTEP–National Yang Ming Chiao Tung University (NYCU) semiconductor education initiative, including dual-program planning, intelligent-manufacturing curriculum development, and student pathways. Related engagement includes collaboration discussions with TSMC and Amkor around semiconductor education and internship opportunities.

I also support international learning opportunities for UTEP students through the NCKU AISSM Semiconductor Summer School at National Cheng Kung University in Tainan, Taiwan. In 2025, four UTEP engineering students participated from July 23 to August 2, gaining experience in semiconductor manufacturing, packaging and IC design through coursework, laboratory activities and industry visits. These experiences connect classroom learning with Taiwan’s semiconductor ecosystem and cross-cultural collaboration.

UTEP news: Engineering Students Gain Global Semiconductor Experience in Taiwan

Watch my IMSE Day talk: The Next Frontier of Virtual Metrology

Space Systems & Satellite Collision Avoidance

Lag-Aware Orbital Neighbor Graphs with Conformal Risk Calibration for Closed-Loop Conjunction Assessment and Safe Maneuver Planning

This research project studies orbital conjunction assessment and maneuver planning when object information is affected by time lag. A lag-conditioned influence graph prioritizes the Top-K neighboring objects around a protected satellite. Probabilistic forecasts describe neighbor-relative trajectories and collision risk, with a memory-attributed risk envelope and a conformal-calibration component supporting risk assessment.

The planning stage generates candidate maneuvers and constructs a Pareto menu that satisfies specified constraints, allowing mission policy or an operator to select among competing objectives. Only the first action is committed before new orbital snapshots are assimilated and the planning horizon advances.

Research framework: lag-aware threat recognition → calibrated risk forecasting → constraint-aware maneuver planning.

Ph.D. researcher: Mustafizur Rahman · Advised by Dr. Chin-Yih Lin.

Patent Application

Inventors: Chin-Yih Lin; Tzu-Liang Tseng; Yirong Lin

U.S. Patent Application No.: 64/025,035