• Useful Links:
  1. CMC STANDARD MODELS

2. Berkeley Device Modeling Center (BDMC)  

3. BSIM Group, UC Berkeley
4. Semiconductor Fabrication 101 (Intel and Purdue University)

5. How to Start Your Journey Towards a Purdue Semiconductor Credential

6. Short Course on Nano-Transistors 2021

7. Intel New Room  - Youtube: Intel Newsroom
8.  ChipsHub  -  NanoHub
9.   NanoHub
10.  Invited Talk: MOS-AK, June 20-22, 2019, Chengdu, China: Link

• Intel 14 nm n-FinFET and p-FinFET extracted model card [Link] (BSIM-CMG) used for the following published IEEE TED Work:
  Collaborative Works: Device-circuit reliability framework (IIT Bombay):

1. Subrat Mishra, Hussam Amrouch, Jerin Joe, Chetan K Dabhi, Karansingh Thakor, Yogesh S Chauhan, Jörg Henkel, Souvik Mahapatra  "A Simulation Study of NBTI Impact on 14-nm Node FinFET Technology for Logic Applications: Device Degradation to Circuit-Level Interaction," in IEEE Transactions on Electron Devices, vol. 66, no. 1, pp. 271-278, Jan. 2019.

2. S. Mishra, N. Parihar, A. R, C. K. Dabhi, Y. S. Chauhan and S. Mahapatra, "NBTI-Related Variability Impact on 14-nm Node FinFET SRAM Performance and Static Power: Correlation to Time Zero Fluctuations," in IEEE Transactions on Electron Devices, vol. 65, no. 11, pp. 4846-4853, Nov. 2018.

3. A Thirunavukkarasu, Hussam Amrouch, Jerin Joe, Nilesh Goel, Narendra Parihar, Subrat Mishra, Chetan K Dabhi, Yogesh S Chauhan, Jörg Henkel, Souvik Mahapatra , "Device to Circuit Framework for Activity-Dependent NBTI Aging in Digital Circuits," in IEEE Transactions on Electron Devices, vol. 66, no. 1, pp. 316-323, Jan. 2019.

• PhD Defence Presentations:

• TAT GIDL Work Presentation: Part of PhD and PostDoc Work:
  Web Links: Presentations DRC 2022

1. Compact Modeling of Temperature-Dependent Gate-Induced Drain Leakage Including Low-Field Effects, TED 2019

2. Compact Model for Trap Assisted Tunneling based GIDL, DRC 2022

3. Anomalous GIDL Effect With Back Bias in FinFET: Physical Insights and Compact Modeling, TED 2021