Machine learning is a powerful technique that can derive knowledge from large data set, and provide prediction and modeling. Since VLSI chip designs have extremely high complexity and gigantic data, recently there has been a surge in applying and adapting machine learning to accelerate the design closure. In this talk, we will explore the applications of machine learning in Electronic Design Automation (EDA) for improving the efficiency and quality of the design process. We will cover topics such as architecture design, physical design, and mask optimization, and discuss how machine learning can be used to enhance these areas. Specifically, we will examine how machine learning can help overcome the challenge of "small data" in IC design, how it can be used to customize for "large and binary" layout, and how it can assist in architecture search for industrial applications.

 Speaker Bio:  

Prof. Bei Yu is currently an Associate Professor in the Department of Computer Science and Engineering, The Chinese University of Hong Kong. He has served as TPC Chair of ACM/IEEE Workshop on Machine Learning for CAD, and in many journal editorial boards and conference committees. He is Editor of the IEEE TCCPS Newsletter. He received nine Best Paper Awards from DATE 2022, ICCAD 2021 & 2013, ASPDAC 2021 & 2012, ICTAI 2019, the VLSI Journal in 2018, ISPD 2017, SPIE Advanced Lithography Conference 2016, and six ICCAD/ISPD contest awards.