Optimizing Memory Access in EDA Algorithms, AI Accelerators and PIM Architectures
Seminars > Seminar Details
by Xiaoming Chen
Associate Professor
Institute of Computing Technology, Chinese Academy of Sciences
As the performance gap between processors and memories is becoming larger, memory access is becoming the bottleneck for data-intensive applications. In this talk, we introduce memory access (communication) optimization strategies in three different areas. 1) The sparse direct solver is the bottleneck in SPICE circuit simulators. We propose gathering nonzero elements to form dense subblocks to reduce irregular memory access. 2) Off-chip memory access usually takes a large portion of the total energy in CNN accelerators. We derive the lower bound of off-chip memory access to reduce the communication energy. 3) Processing-in-memory is a promising solution to solve the communication challenge. However, most PIM accelerators are dedicated so some tasks need to be computed on CPU. We propose multi-functional PIM accelerators to support different tasks.
Speaker Bio:
Dr. Xiaoming Chen received the BS and PhD degrees in electronic engineering from Tsinghua University in 2009 and 2014, respectively. He is now an associate professor with Institute of Computing Technology, Chinese Academy of Sciences. His current research interests include EDA and computer architecture. He has published more than 100 papers and 1 book in these areas. He was a recipient of the 2015 European Design and Automation Association (EDAA) Outstanding Dissertation Award, 2018 DAMO Academy Young Fellow Award, NSFC Excellent Young Scientists Fund 2021, and ASP-DAC 2022 Best Paper Award.
References
Xiaoming Chen, Lixue Xia, Yu Wang, Huazhong Yang, "Sparsity-Oriented Sparse Solver Design for Circuit Simulation", in 2016 19th Design, Automation, and Test in Europe (DATE'16).
Xiaoming Chen, Yinhe Han, Yu Wang, "Communication Lower Bound in Convolution Accelerators", in 2020 International Symposium on High-Performance Computer Architecture (HPCA'20).
Xiaoyu Zhang, Rui Liu, Tao Song, Yuxin Yang, Yinhe Han, Xiaoming Chen, "Re-FeMAT: A Reconfigurable Multifunctional FeFET-based Memory Architecture", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE TCAD), 2022.