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by Andrew B. Kahng
Distinguished Professor, Department of CSE and ECE
Chair, High-Performance Computing
University of California San Diego
Talk Slides:
Scaling means getting better results with less resources: people, money, time. Scaling challenges in hardware system innovation are often tied to scaling challenges in IC design, which in turn are tied to scaling challenges in EDA technology. But the fundamental challenge is to scale people: enable them to accomplish more, with less of their time, within a reduced schedule. As we pursue research and impact at the nexus of EDA, machine learning and AI, what mindsets will enable us to address this challenge?
Speaker Bio:
Prof. Andrew B. Kahng is Distinguished Professor of CSE and ECE and holds the endowed chair in high-performance computing at UCSD. He has been visiting scientist at Cadence (1995-97) and founder/CTO at Blaze DFM (2004-06), is a fellow of ACM and IEEE, and was the 2019 Ho-Am Prize laureate in Engineering. He has served as general chair of DAC, ISPD and other conferences, and from 2000-2016 served as international chair/co-chair of the International Technology Roadmap for Semiconductors (ITRS) Design and System Drivers working groups. He is currently principal investigator of “OpenROAD” https://theopenroadproject.org/, and principal investigator and director of The Institute for Learning-enabled Optimization at Scale, https://tilos.ai/.
References
“Leveling Up: A Trajectory of OpenROAD, TILOS and Beyond”, Proc. ACM/IEEE Intl. Symp. on Physical Design, March 2022. .pdf .pptx
“AI/ML, Optimization and EDA in TILOS, an NSF National AI Research Institute”, GLSVLSI, June 2022. .pptx
“Machine Learning for Electronic Design Automation: Irrational Exuberance or the Dawn of a Golden Age”, Design Automation Conference panel, July 2022. Position statement .pptx
“For the Record – An Update”, August 2022.
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