Efficient Digital Design and Implementation with Machine Learning in EDA
Seminars > Seminar Details
by Zhiyao Xie
Assistant Professor
Department of Electronic and Computer Engineering
Hong Kong University of Science and Technology
Talk Slides:
As the integrated circuit (IC) complexity keeps increasing, the chip design cost is skyrocketing. Semiconductor companies are in increasingly greater demand for experienced man-power and stressed with unprecedented longer turnaround time. Therefore, there is a compelling need for design efficiency improvement through new design automation techniques. In this talk, I will present efficient chip design and implementation techniques based on machine learning (ML) methods, whose major strength is to explore highly complex correlations based on prior data. These techniques cover various chip-design objectives. Instead of spending tremendous engineering effort in developing customized ML models, we propose to automate the model development procedure. In addition, we target benefiting the whole chip life cycle with a unified ML framework for both chip design and runtime. This involves automatically designing a low-cost monitoring module as part of the circuit RTL. These ideas will be illustrated in detail with our recent works on early power and routability estimations.
Speaker Bio:
Prof. Zhiyao Xie is an Assistant Professor at the ECE Department of Hong Kong University of Science and Technology (HKUST). He received his Ph.D. degree from the ECE Department of Duke University in 2022 and B.Eng. degree from City University of Hong Kong in 2017. His research interests include machine learning and its applications in EDA, VLSI design, and computer architecture. He received the Best Paper Award in MICRO 2021.
References
Zhiyao Xie, Xiaoqing Xu, Matt Walker, Joshua Knebel, Kumaraguru Palaniswamy, Jiang Hu, Huanrui Yang, Yiran Chen, Shidhartha Das, “APOLLO: An Automated Power Modeling Framework for Runtime Power Introspection in High-Volume Commercial Microprocessors”, IEEE/ACM MICRO, 2021.
Chen-Chia Chang, Jingyu Pan, Tunhou Zhang, Zhiyao Xie, Jiang Hu, Weiyi Qi, Chung-Wei Lin, Rongjian Liang, Joydeep Mitra, Elias Fallon, Yiran Chen, “Automatic Routability Predictor Development Using Neural Architecture Search”, IEEE/ACM ICCAD, 2021.
Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Ang Li, Minxue Tang, Tunhou Zhang, Jiang Hu, and Yiran Chen. “Towards Collaborative Intelligence: Routability Estimation based on Decentralized Private Data”. In ACM/IEEE DAC, 2022.