Trace System, Siemens - OCP CDX: Demo Design
Design kit development for 2.5D/3D integration
OCP 2.5D demo design with glass interposer
Design 2.5D IC layout and perform SI/PI/Thermal analysis
Semiconductor Research Corporation (SRC) - JUMP 2.0: CHIMES
Design Rapid Prototype Vehicle (RPV)
UCIe-based ultra large-scale chiplet integration
Methodology for effective power supply and thermal management
Korea Evaluation Institute of Industrial Technology (KEIT)
Sensitivity exploration for 2.5D chiplet/interposer co-design
ML-based sensitivity prediction model optimization for bump pitch sensitivity
Interconnect material sensitivity
Meta / Packaging Research Center ( PRC - Georgia Tech )
Explore and Design 5.5D ICs using glass interposer with chiplet integrations
Analyze the tradeoff in terms of Power Performance and Area (PPA), Power / Signal Integrity and Thermal Analysis