Trace System, Siemens - OCP CDX: Demo Design
2.5D/3D Design Kit Standardization and Demo Workflow
Design kIt standard for 2.5D/3D heteroneous integration.
Open-sourced chiplet/interposer demo workflow for 2.5D/3D
Samsung Electronics
Power Delivery Network Design Space Exploration for 2.5D/3D
Chiplet and interposer Power Delivery Network (PDN) co-analysis flow for power integrity.
Design space exploration for different PDN design parameters and integration type.
Semiconductor Research Corporation (SRC) - JUMP 2.0: CHIMES
Heterogeneous Integration of Micro Electronic Systems
Sensitivity analysis for 2.5D design parameters.
AI-driven prediction and optimization methodology for 2.5D.
Meta / Packaging Research Center ( PRC - Georgia Tech )
Glass Interposer Integration and PPA Benefits
Explore and Design 5.5D ICs using glass interposer with chiplet integrationsÂ
Analyze the tradeoff in terms of Power Performance and Area (PPA), Power / Signal Integrity and Thermal Analysis
Samsung Electronics, National Research Foundation
Emerging Technologies in Advanced Technology Node
Develop 5nm/3nm Process Design Kit (for the first in academia).
Reinforcement learning-based Back-side Power Delivery Network optimization.