[P8, ongoing] 64-Channel data-aware Neural Recording and Stimulating Chip (Lotus Chip)
[P8, ongoing] 64-Channel data-aware Neural Recording and Stimulating Chip (Lotus Chip)
Project Description:
In this project, we present a new 64-channel neural recording/stimulating system in 22nm FDSOI including :
back-gate adapted ultra-low-voltage spike-aware neural recording front-end
on-chip lossless/near-lossless compression engine
3.3V stimulator
Adaptive back-gate voltage tuning (ABGVT) compensates for PVT variation in subthreshold circuits.
The proposed system achieves:
The proposed dynamic operation scheme reduces average power by 20.7-53.7% for neuronal firing rates of 20-200Hz.
Constant sampling with a bandwidth of 9.8kHz yields 6.73µV input-referred noise (IRN) at a power-per-channel of 0.34µW for the time-continuous ΔΣ-modulator, and 0.52µW for the digital filters and spike detectors.
The ACE consumes 230 µW dynamic- and 55.49µW leakage-power, when operated in parallel, achieving an average space saving ratio (SSR) of 62.5% in LL mode and 91% in the NLL mode.
Hardware Implementation:
Fabricated in 22-nm FDSOI SoC technology.
Please refer to the following publications for further details:
[J9] F. Schüffny, S. Hoeppner, S. Hanzsche, R. George, S. M. A. Zeinolabedin, and C. Mayr, “Power Minimisation in Neural Recording ΔΣ Modulators by Adaptive Back-Gate Voltage Tuning,” IEEE Solid-State Circuits Letters (SSC-L), 2023.
[C18] F. Schüffny, S. Hanzsche, S. Henker, S. M. A. Zeinolabedin, S. Scholze, S. Hoeppner, R. M. George and C. Mayr, "A 3.3V Saturation-Aware Neurostimulator with Reset Functionality in 22nm FDSOI”, IEEE Interregional NEWCAS Conference, May 2023.
[C17] L. Guo, S. M. A. Zeinolabedin, F. M. Schüffny, A. Weiße,S. Scholze, R. M. George, J. Partzsch, Christian Mayr, “A 16-channel Real-time Adaptive Neural Signal Compression Engine in 22nm FDSOI”, IEEE Interregional NEWCAS Conference, May 2023.
[C16] F. M. Schuffny, S. Hanzsche, M. Berthel, S. M. A. Zeinolabedin, S. Scholze, S. Hoppner, R. M. George, C. Mayr, “A Single Battery Supply Power Concept for a Neuro Recording and Flexible Processing Chain in 22 nm”, IEEE Nordic Circuits and Systems Conference (NorCAS), 2022.
[C14] F. M. Schüffny, S. M. A. Zeinolabedin, R. George, L. Guo, A. Weiße, J. Uhlig, J. Meyer, A. Dixius, S. Hänzsche, M. Berthel, S. Scholze, S. Höppner, C. Mayr, "A 64-Channel back-Gate Adapted ultra-low-Voltage spike- Aware Neural Recording front-End with on-Chip lossless/near-Lossless Compression Engine and 3.3V Stimulator in 22nm FDSOI", IEEE Asian Solid-State Circuits Conference (ASSCC), 2022.