[P12] NLU: An Adaptive, Small-Footprint, Low-Power Neural Learning Unit for Edge and IoT Applications (ICEBERG Chip)
[P12] NLU: An Adaptive, Small-Footprint, Low-Power Neural Learning Unit for Edge and IoT Applications (ICEBERG Chip)
Project Description:
Over the last few years, online training of deep neural networks (DNNs) on edge and mobile devices has attracted increasing interest in practical use cases due to their adaptability to new environments, personalization, and privacy preservation. Despite these advantages, online learning on resource-restricted devices is challenging. This work demonstrates a 16-bit floating-point, flexible, power-and memory-efficient neural learning unit (NLU) that can be integrated into processors to accelerate the learning process.
Hardware Implementation:
Fabricated in 22-nm FDSOI SoC technology.
Please refer to the following publications for further details:
[J11] A. Rostami, S. M. A. Zeinolabedin, L. Guo, F. Kelber, H. Bauer, A. Dixius, S. Scholze, M. Berthel, D. Walter, J. Uhlig, B. Vogginger, C. Mayr, "NLU: An Adaptive, Small-Footprint, Low-Power Neural Learning Unit for Edge and IoT Applications ", IEEE Open Journal of Circuits and Systems (OJCS), 2025.