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Digital Logic Design
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Karnaugh Map
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SR Latch Working
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Digital Logic Design Lab
1 Lab Equipment
2 Logic Gates
3 Universal Gate Logic
3 Boolean Function
4 DeMUX n Decoder
5 Binary Adder
6 ROM from DRL
7 SR Latch
8 Design with D-FF
9 JK FF
10 Shift Registers
11 Counters
12 Decade Counter
13 Install HDL
14 VHDL Intro
15 VHDL MUX
Lab Report Guidelines
Data Science Lab
Python basics
Classes and objects
Tuples and lists
Pandas and dataframes
Data Statistics
Webscraping using BFS
Frequency Analysis
Regression model
Naive Baysian
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