1.  To appear @PPOPP'25 with Trevor Brown

   • Publish on Ping: A Better Way to Publish Reservations in Memory Reclamation for Concurrent Data Structures

2. [2024]: @PPOPP with Trevor Brown and Daewoo Kim

   • Are Your Epochs Too Epic? Batch Free Can Be Harmful

   • [preprint] [code]

3. [2023]: @IEEE TPDS with Trevor Brown and Ali Mashtizadeh

   • Simple, Fast and Widely Applicable Concurrent Memory Reclamation via Neutralization 

   • [paper] [code]

4. [2023]: @IPDPS with Trevor Brown and Michael Spear

   • Efficient Hardware Primitives for Immediate Memory Reclamation in Optimistic Data Structures 

   • [paper][arxiv] [code]

5. [2021]:  @PPOPP with Trevor Brown and Ali Mashtizadeh

   • NBR: Neutralization Based Reclamation

   • Best Paper Candidate (Top 4 Manuscripts)

   •  Best Artifact Award

   • [Tech-Report] [paper] [video][guest lecture in cs798] [code]

6. [2019]:  @ NETYS, Morocco, with Sathya Peri and Archit Somani. 

   • Efficient means of Achieving Composability using Object based Semantics in Transactional Memory Systems.

   • [Tech-Report] [paper] [code]

7. [2018]: @ ICDCN, IIT-BHU , AADDA workshop  [Work in Progress Paper] with Sathya Peri and Archit Somani .

   • Proving Correctness of Concurrent Objects by Validating Linearization Points.

   • [paper]

8. [2017]: @HiPC, Jaipur,  [poster],  with Marc Shapiro, Gael Thomas.

   • Persistent Memory Programming Abstractions in Context of Concurrent Applications

   • [paper][poster][code]

9. [2017]: @PARCOMPTECH, IISC Bangalore, with Sathya Peri, Anila, Mounika.

   • STM Concurrency Control Protocols vs  Synchrobench - A performance comparison 

   • [paper] [ppt] [code]

10.  [2017] : @ICDCN, Hyderabad, Workshop(AADDA) [Work in Progress Paper] Archit Somani, Dr Sathya Peri

    • Achieving greater Concurrency using Object-Based Software Transaction Memory Systems 

    • [paper]

11. [2016]: @IPDPS, Hyderabad [Poster], with Archit Somani, Dr Sathya Peri

    • Achieving greater Concurrency using Object-Based Software Transaction Memory Systems 

    • [pdf]

12. [2016]: @XRCI Open 2016, [Poster], with Priyanka Kumar, Sathya Peri, Muktikanta Sa

    • Impossibility of online scheduling with MVCOpacity and MVC Algorithm for multi-version STM

    • [pdf]

[2024] PhD Thesis:  Safe Memory Reclamation Techniques [link]

[2018] Master Thesis:  Efficient means of Achieving Composability using Transactional Memory [link]

Technical Reports:

1. [2018]: Efficient means of Achieving Composability using Object based Conflicts on Transactional Memory,  with Sathya Peri and Archit Somani [report]

2. [2017]: Persistent Data Structures using Non Volatile Memory, with Marc Shapiro and Gael Thomas [report]

3. [2016]: An Efficient Middleware based on Multi-Version Transactional Memory System for Multi-Core Systems, with Sathya Peri and Archit Somani [report]

4. [2015]: An Efficient Middleware for Multi-Core Systems using Transactional Memory Systems, Sathya Peri and Archit Somani [report]

5. [2015]: Transportation Flow Modeling and Visualization for Disaster Management Applications,with C. Krishna Mohan and Debaditya Roy [report]