Lecture Slides, Code and Examples
Tue Mar 27: Lecture 1A: Introduction
Tue Mar 27: Lecture 1B: System Verilog, Part 1
Thu Mar 29: Lecture 2A: System Verilog, Part 2
Thu Mar 29: Lecture 2B: C Language, Part 1
Tue Apr 3: Lecture 3A: Counters; Verilog Styles
Tue Apr 3: Lecture 3B: Verilog Delays (System Verilog Part 3)
Tue Apr 3: Lecture 3C: C Language, Part 2
Thu Apr 5: Lecture 4A: Finite State Machine example: Traffic lights
Thu Apr 5: Lecture 4B: LFSRs
Thu Apr 5: Lecture 4C: C Language, Part 3
Tue Apr 10: Lecture 5A: Error Detection: Cyclic Redundancy Check (CRC)
Tue Apr 10: Lecture 5B: Introduction to Error Correcting Codes, Pt 1
Tue Apr 10: 5C: Signal Tap Demo by Jared
Thu Apr 12: Lecture 6A: Introduction to Error Correcting Codes, Pt 2
Thu Apr 12: Lecture 6B: Implementing CRCs via LFSRs in Verilog
Thu Apr 12: Lecture 6C: Programmatically creating arrayed structures with Generate blocks
Tue Apr 17: Lecture 7A: Signed numbers
Tue Apr 17: Lecture 7B: Arithmetic Logic Units
Tue Apr 17: Lecture 7C: Memory, Pt 1
Thu Apr 19: Lecture 8A: The Cordic Algorithm
Thu Apr 19: Lecture 8B: Lab Clarification
Thu Apr 19: Lecture 8C: Memory, Pt2
Tue Apr 24: Lecture 9A: Memory Pt3, FPGA arch
Tue Apr 24: Lecture 9B: FPGAs in the cloud: Amazon EC2 F1 FPGA instances
Tue Apr 24: Lecture 9C: MIPS architecture
Thu Apr 26: Lecture 10A: Timing: Propagation delay, contamination delay
Thu Apr 26: Lecture 10B: Verilog implementation of single cycle MIPS processor, Pt 1
Tue May 1: Lecture 11A: Verilog implementation of single cycle MIPS processor, Pt 2
Tue May 1: Lecture 11B: Discussion of lab & final project
Tue May 1: Lecture 11C: C Language Part 4 (NIOS serial example)
Thu May 3: Lecture 12A: Wired communication protocols (UART, RS-232, Ethernet...), Pt 1
Tue May 8: Lecture 13A: DE1 SOC Peripherals
Tue May 8: Lecture 13B: AMBA (Arm on-chip) Bus
Tue May 8: Lecture 13C: Wired Communication Protocols (Ethercat, USB), Pt2
Thu May 10: Lecture 14A: JTAG
Thu May 10: Lecture 14B: Multi-cycle Processor
Tue May 15: Lecture 15A: Fast Fourier Transform
Thu May 17: Activity 16A: Presentation of project quad charts
Thu May 17: Lecture 16B: Signal Integrity
Tue May 22: Activity 17A: Presentation of project quad charts
Tue May 22: Lecture 17B: Pipelined Processor
Thu May 23: Lecture 18A: HW Architectures for Deep Neural Networks, Pt 1
Tue May 29: ET&L assessment
Thu May 31: Lecture 19A: HW Architectures for Deep Neural Networks, Pt 2
Thu May 31: Lecture 19B: Low power design