Homework Assignment #1
EE 477 Spring 2010 Professor Parker
Hardcopies due in the course boxes on the first floor of EEB 5 PM 2/4/2010
Ecopies due 11:59 PM 2/4/2010 using the "Assignment" Function on DEN
To ensure academic privacy, please use a cover page on your homework hard copies that does not contain any work.
1. (5%) Give the Boolean expressions for a three-bit comparator computation with output C and inputs Xi, Xi+1, Xi+2 and Yi, Yi+1 and Yi+2. X and Y are being compared. C is high (1) when X is > Y, and 0 (zero) otherwise. The ith bit is the least significant bit.
2. (10%) Show an implementation of the comparator computation in Problem 1 above at the gate level using complementary NAND, NOR and INV gates. You may not use XOR or XNOR gates.
3. (15%) Show an implementation of the comparator computation from Problem 2 at the circuit (transistor) level ( for an example of complementary CMOS NAND gates and inverter, See Fig. 1 for example).
4. (10%) Show a compound gate implementation of the comparator at the circuit (transistor) level, similar to the compound gate shown in Fig. 2. You may need an additional inverter at the output of a compound gate to get correct results.
5. (10%) Show a stick diagram of a 7-input NAND gate, labeling the layers or using colors for the different layers as shown in lecture.
6. (20%) . Use the same style of design as Problem 3 (See Fig. 1) but use only NAND and INVERT gates to build a transistor-level circuit that implements a carry out of an adder, assuming there is a carry in (full adder). You may not use XOR or XNOR gates.
Note: You can assume the complements of the inputs also to be inputs to the circuit. You can use gates with any number of inputs.
7. (10%) Again refer to the style of compound gate circuit used in lecture (See Fig. 2 for an example).
Redesign your circuit from Problem 6 at the transistor level using a compound gate. You might have to invert the output with an inverter. Show the compound gate transistor diagram. Compare the number of transistors to the original design in Problem 6.
8. (10%) Show a design at the transistor level of a 9-input mux. Use only NAND gates and inverters.
9. Design a latch that can be asynchronously set. The MUX used in the latch should be constructed using transmission gates.
10. (10%) Make a directory (folder) on your UNIX account that is called HW1. Create a small file on your UNIX account that contains your full name on the first line and your student number on the second line. Use EMACS or any other unix editor to create the file. Save the file in the HW1 directory as yourlastname.txt. Change the directory to HW1. Give the results of typing the command ls -l yourlastn* , leaving off the last three letters of your last name. If your last name is two words with a space in between, use the last word.