A. Parker EE 477L Spring 2006

Homework Assignment #3

Due 2/17/05 4 PM in EEB 106

Assume for the problems below that Vdd = 2.5 v, V_tp0 is -.6 v. and V_tn0 is .6 V.

Assume ß_n (k_n)= 219.4 W/L µ A(microamps)/V2 and ß_p (k_p)= 51 W/L µ A/V2

1. A Boolean equation for computing a function of a 4-bit value is shown below:

P =[(LM)+N]K+(M[/N]L)+[/K]

(a) (15%) Start by drawing the transistor level diagram for a compound gate to compute NOT(P), without simplifying the equation. Assume you have both true and inverted values of N and K as inputs .

The goal is to find an Euler path for the gate that is the same for both PMOS and NMOS transistors. You might be able to find one on the original circuit but you may need to rearrange the circuit by manipulating the Boolean equation so that you have an Euler path. At least one exists.

(b) (25%) Create a stick diagram from the Euler path, showing PMOS and NMOS diffusion areas, poly, and metal. Put vertical metal connections on metal 1, and horizontal ones on metal 2, including Vdd and Gnd. Use the methodology shown in lecture and in the text for the stick diagram. Use purple for metal 2.

2. (10 %) An NMOS transistor has V_DS = 1.5 V. If the transistor is in the linear region of operation, what are the possible values of V_GS?

3. (10 %)A PMOS transistor has V_GS =-.7 V , V_DS = -1.1 V. What region of operation is it in? Now assume V_GS = -1.3 V and V_DS = -2 V. What region of operation is the transistor in?

4.(10 %) We observe that an NMOS device has a higher Vt

than normally expected. What could be causing this? Would the drain current be larger or smaller than normal?

5. (10 %) Use the left edge algorithm to connect the common inputs that are in the following order:

A B C B D /A B A C /A D

Show the stick diagram for the connections, assuming horizontal connections are in metal 1, and vertical ones are in poly.

6. (10 %) Compute the drain current flow I_DSin an NMOS transistor when V_DS = .9 v, and V_GS = 1.7 V. Assume the transistor width is 4 lambda and the length is 2 lambda.

7. (10%) Compute the drain current flow I_DSin a PMOS transistor when V_DS = -2.2 v, and V_GS = -1.7 V. Assume the transistor width is 4 lambda and the length is 2 lambda.

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