University of Southern California

Department of Electrical Engineering - Systems

EE 477 Laboratory #3

Module Design, IRSIM and SPICE

Laboratory #3 Due April 30, 2004, 4:00 PM

This lab addresses the design of a special-purpose circuit. You can use any combination of clocks you wish, but only clock is an input to the circuit and you will have to design circuits to generate the other clocks. You should use the cells you designed in labs 1 and 2 to build your circuit. You can change transistor sizes in your inverters. Do not change the circuit structure of your cells. However, you can modify the layout in minor ways if you can see some ways to make the circuits smaller or faster. Make sure your ohmic contacts meet the following requirement: two contacts per 50x50 lambda, one for psubstrate and the other for nwell. Every separate block of nwell should have at least one ohmic contact.

For this lab, you can use any layout strategy you choose. The goal is to minimize the area·delay (the product of area and delay). Designs that are more square, rather than long, thin rectangles, tend to be better designs. The designer with the lowest area-delay product will win a prize, a gift certificate from Amazon.com. There will be two prizes, one for the best undergraduate design and one for the best graduate design. Pay close attention to the specific delay you are to measure.

1. Design your circuit and create a MAGIC layout using the cells you have already designed. The bulk of the work here should be the routing of your design. Include your logic/gate level diagram.

2. Simulate your layout with IRSIM to ensure that it works logically. Set up the inputs so that you test the circuit completely.

3. Simulate your circuit with SPICE. The delay you should measure with SPICE is described in the project description as the clock cycle. The faster your clock cycle, the faster your circuit will function.

4. Measure the area of your design in square lambda. Compute the area-delay product of your design. Be sure you convert microns to lambda in order to get credit for this part of the lab.

Lab Report Contents:

1.Title page

2.Discussion and explanation of how your design works.

3.Block diagram of your design

4.Floorplan (where each cell is on your layout)

5.IRSIM outputs for your design.

6.Layout

7.Area-delay product