University of Southern California

Department of Electrical Engineering - Systems

EE 477 Laboratories #3 and 4

Module Design, IRSIM and SPICE

Laboratory #3 Due April13, 2001 4:00 PM

Laboratory #4 Due April 27th, 2001 4:00 PM

This lab addresses the design of a special-purpose circuit. You can use any combination of clocks you wish, since these are inputs to the circuit and you do not have to design them. You should use the cells you designed in labs 1 and 2 to build your circuit. Do not change transistor sizes here.

The circuit you are to design performs the following function: It compares a 4-bit value stored in flipflops to a 4-bit value input to the circuit. The output signal match is set to 1 if a match is found. Every clock cycle, it performs the identical function, so if a match is found the output match signal goes high, but then goes low the next clock cycle unless another match is found. The input 4-bit value can change every clock cycle. If a match is not found, the input 4-bit value is loaded into the flip-flops and used for the next comparison.

Here's a pseudocode description of the circuit. ! indicates a comment

module pattern_finder(4bit_value,match); !Here's the description

input 4bit_value[3:0]; ! the bits are called bit 3,2,1 and 0.

output match;

variable past_value[3:0];

if (4bit_value equal past_value) ! check for equal values

{

match = 1; ! the values match

}

else

{

match = 0; ! no match found

past_value = 4bit_value; ! save new value for next comparison

}

end module;

For this lab, you can use any layout strategy you choose. The goal is to minimize the area·delay (the product of area and delay). The designer with the lowest area-delay product will win a prize, a gift certificate from Amazon.com. Pay close attention to the specific delay you are to measure.

lABORATORY #3

1. Design your circuit and create a MAGIC layout using the cells you have already designed. The bulk of the work here should be the routing of your design. Include your logic/gate level diagram.

2. Simulate your layout with IRSIM to ensure that it works logically.

3. Simulate your circuit with SPICE. Set up the inputs so that the first cycle there is no match, the second cycle there is a match and the third cycle there is no match again. Measure the delay from the time the matchsignal is low to the time it is high, and vice versa. Use the delay definitions given in the text. Compute the average of the two delays in nanoseconds.

4. Measure the area of your design in square l. Compute the area-delay product of your design. Be sure you convert microns to l in order to get credit for this part of the lab.

LABORATORY #4

5. Replace the flip-flop design with dynamic storage. Simulate with SPICE. Compare the area and delay to your initial design.