Homework Assignment #6

E477 Fall 2018 Professor Parker

Due 11/12/18 10AM

Hardcopies due in the course boxes in the basement of EEB

OR Ecopies using the "Assignment" Function on DEN

Assume lambda is .1 microns. Assume Vdd is 1.8 V, V_tp0 is -.4 V. and V_tn0 is .4 V. V_tpbodyeffect is -.55 V. and V_tnbodyeffect is .55 V.

Tox = 57 angstroms for thinox, and 5000 angstroms for thick oxide. Metal thickness is .5 microns.

You can use these values for transistor ks (betas): ß_n (k_n) (beta)= 219.4 W/L _ A(microamps)/V² and ß_p (k_p)(beta)= 51.9 W/L m A/V² .

e₀ (epsilon) = 8.85 X 10 ^-14 F/cm, e_oxide(epsilon) = 3.9, and e_silicon(epsilon) = 11.7.

N_A=4X10¹⁸cm^-3 (substrate doping)

N_D=2X10²⁰ cm^-3 (source/drain doping)

N_A(sw)=8X10¹⁹ cm^-3 (Sidewall (p+) doping)

n_i²= 2.1X10²⁰ cm^-3 (intrinsic carrier concentration of silicon)

x_j (diffusion depth) =32 nm

KT/q= .026 V (thermal voltage)

Cjbsn = 17.27 x 10-4 pF/ _m ² and Cjbswn = 4.17 x 10-4 pF/ _m (micrometer).

Cjbsp = 18.8 x 10-4 pF/ _m ²and Cjbswp = 3.17 x 10-4 pF/ _m (micrometer).

Assume drain capacitances are the same as the source (in practice they are not).

1. a) (15%) Connect an output of a 2-input NOR through a long wire to the input of a second 2-input NOR. For the NORs, assume Rchn=Rchp = 1000 ohms, Cgn=Ggp/4=Cdn=Cdp/4=10 ff. For the wire assume Rw= 100 ohms and Cw =200ff. Compute the rise and fall times at the input to the second NOR using lumped wire model and compare rise to fall time.

b) (10%) Recompute using the Elmore delay model.

c) (15%) Insert an inverter at 1/3 and 2/3 of the way along the wire. For the inverters, assume Rchn=Rchp = 1000 ohms, Cgn=Ggp/4=Cdn=Cdp/4=10 ff. Compare the rise time at the input of the second NOR to the rise time found in part (a) using the lumped wire model.

d) (10%) Recompute part c using the Elmore delay model.

2. (10%) Use the fringing field figure on p. 274 of the text. Assume w/l = 0.2, and w/h = 0.25. Estimate the fringing field factor if t/h = 0.4. What is the definition of w, h, l, and t?

3. (10%) Assume signals in a wire on a CMOS chip move at v m/sec and the rise/fall time on the wire is 0.01ns. Assuming wire length is 1 cm, what electron signal velocity would require us to consider inductance?

4. (10%) Compute the source diffusion capacitance of an unit size NMOS transistor with minimum diffusion length. Comment: Use the known values of Cjbsn, Cjbswn etc. Don't compute them. The minimum diffusion length is the same as the minimum diffusion width.

5. (10%) Assume a wire is 150 microns long. Assume R/micron = .01 ohms/square, and the wire is minimum width. What is the total wire resistance?

6. (10%) Compute the gate capacitance for a PMOS transistor in the linear and Saturation regions. The PMOS transistor dimensions are: W=16 lambda, L= 2 lambda. Assume L_D=0.1 nm.