Homework Assignment #4

EE 477 Fall 2015 Professor Parker

Hardcopies due in the course boxes in the basement of EEB 5 PM 10/13/15

OR Ecopies due 5 PM 10/13/15 using the "Assignment" Function on DEN

To ensure academic privacy, please use a cover page on your homework hard copies that does not contain any work. Turn in EITHER a hard copy or ecopy, not both.

Assume for the problems below that V_dd = 1.8 v, V_tp0 is -.7 v. and V_tn0 is .7 V. V_tpbodyeffect is -.9 v. and V_tnbodyeffect is .9 V.

Assume ß_n (k_n)= 219.4 W/L µ A(microamps)/V² and ß_p (k_p)= 51 W/L µ A/V²

1.a (10%) Sketch the voltage input/output transfer curve of an inverter for the case at which kn=kp. Label the 5 segments A, B, C, D, and E, the negative slopes of -1, VIL and VIH, and the input voltage at point C on the curve.

1.b (5%) What are the regions of operation of the transistors on each segment?

2.a (2.5%) Which transistor changes its region of operation when the inverter moves from segment B to C.

2.b (2.5%) Which transistor changes its region of operation when the inverter moves from segment C to D.

3.a (2.5%) If Kn>Kp which transistor stays ON over more of the input/output transfer curve?

3.b (5%) Is NML greater/less than or equal to NMH? Assume VOH = Vdd and VOL= 0V.

3.c (5%) For Kn>Kp, if we connect the output of an inverter to the input of another inverter through a long wire that introduces noise, what should the range of input voltages at the input of the second inverter be to guarantee the output of the second inverter has a valid logic 1?

4. (2.5%) What does it mean to have a noise margin NML of .2 in terms of the amount of noise that can be added to the signal and still have correct results?

5.a (5%) Why do we typically want the inverter to be sized so that we can meet the condition kn=kp?

5.b (5%) If we want to have a fast inverter, is it a good idea to have a wider range of inputs between VIL and VIH? If not, explain in terms of VIL and VIH how can we have a faster inverter.

6. (10%) Sketch Vgsn (Y-axis) as a function of |kn/kp| (x-axis) for the given formula in lecture notes 11-7-15 for the C region. At least 3 points should be recorded, one for the condition Kn=Kp, Kp>Kn, and Kp<Kn.

7. (5%) Do we have any current flow through either pmos and/or nmos transistor(s) in region A and E? Is this current comparable in magnitude with the current in region C ?

8. (10%) Assume an inverter is on segment D of the input/output transfer curve. What is the range of V_in that would allow the inverter to remain in segment D?

9. (10 %) An inverter has the transistors sized so that as the output falls from V_dd to G_nd., a current spike occurs at V_in = .75v. What does that tell us about the ratio kp/kn?

10. (10%) An inverter has the transistors sized so that the ratio of k_p to k_n = 1.2. Does this ratio imply that the transistor switches from high to low with a larger or smaller input voltage? What regions are the transistors in when Vin is equal to Vdd/2?

11. (10 %) If an inverter is on segment B of the input/output transfer curve, V_out = 1.7v and V_in = .8v, prove that the PMOS transistor is in the linear region.