Homework Assignment #2
EE 477 Fall 2014 Professor Parker
Hardcopies due in the course boxes in the basement of EEB 5 PM 9/22/14
OR Ecopies due 5 PM 9/22/14 using the "Assignment" Function on DEN
To ensure academic privacy, please use a cover page on your homework hard copies that does not contain any work.
1a. (25%) Design a binary counter that counts down continuously from 15 to 0 skipping numbers 12 and 4. The sequence is 15, 14, 13, 11, 10, …, 6, 5, 3, 2, 1, 0. The outputs of the counter are updated when clock falls. The counter resets to 15 when it reaches 0 or when reset is asserted. Reset is an asynchronous signal. This means that when reset is asserted the counter outputs are set to 15 regardless of the state (high or low) of the clock.
Each flip flop should be a negative edge-triggered flip flop and should contain two latches, as described in class. The flip flop should load new data when reset signal is not asserted. The data loaded into the flip flop will depend on the data currently in the flip flop along with data in the other flip flops.
Your counter should be designed at the gate level except for the multiplexers. Use transmission gates to build the multiplexer at the input to each latch. Remember that new data is only stored if reset is not asserted. You might find it helpful to write the logic function for the multiplexer before producing the design.
Show your solution for the counter as a gate-level diagram.
1b. (5%) Insert the necessary logic to have a function Y (a single bit output) in your design that detects when the output is an even number using the outputs of the counter. This additional logic should be designed at the gate level.
2. (5%) What is the purpose of using a photoresist in the photolithographic process?
3a. (5%) What type of charge (positive or negative) is attracted to the channel underneath the gate area when we apply a positive voltage into the gate input of an NMOS transistor?
3b. (5%) How do we prevent the formation of a parasitic MOS transistor?
4. (10%) Sketch the side view (slice down into the silicon) of a staggered contact that connects poly to metal3 using colored pens or pencils.
5. (5%) What is the difference between staggered and stacked contacts?
6. (5%) Sketch the steps involved in patterning metal1 using a negative photoresistance.
7a. (2%) Sketch the crossection of an NMOS transistor with ohmic contact connected to ground.
7b. (3%) Show the pn junctions in the crossection of an NMOS transistor with diodes. Do we want these pn junctions to be in reverse or forward bias?
8. (5%) Why do we use thin oxide instead of thick oxide under the gate region of the transistor?
9. (5%) Prof. Parker discussed in her lecture the role of hafnium compound in the fabrication of transistors. Briefly summarize the details given in class.
10. (5%) Does the capacitance under the gate increase or decrease with an increase in the dielectric constant of the oxide material?
11. (5%) Hafnium compound is used for which material in the fabrication of a transistor?
12. (10%) In the figure below, draw the cross-section down into silicon along the horizontal yellow line. Contact us if you are having trouble determining layers.
