I am working under Dr. Jack C. Lee as a graduate research assistant since Fall 2011. My research focuses on resistance random access memory (ReRAM), alternative channel high-k quantum well MOSFETs, and emerging devices for a synaptic device and Bio-inspiration from mitochondrion: biomimetic reactive oxygen species production and regulation in electronic.
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SiOx- and SiNx- Based Resistance Random Access Memory (ReRAM): State-of-the-Art Technology, Characterization, and Switching Mechanism Investigation
SiOx- and SiNx- Based Resistance Random Access Memory (ReRAM): State-of-the-Art Technology, Characterization, and Switching Mechanism Investigation
My primary research focused on a highly-compact, one diode–one resistor (1D–1R) nanopillar device architecture for SiOx-based ReRAM fabricated using nanosphere lithography (NSL), and self-rectifying (selector-less) SiNx-based ReRAM devices. My work is significant since it provides additional insights into the best device structure and material design, optimized key fabrication processes and provided a model for device switching mechanisms that will be important for implementing these simple resistive switching devices in future ReRAM applications (Results are published in 2012-2019, Nano Letter, Journal of Applied Physics, Applied Physics Letters, Small, Progress in Solid State Chemistry etc.)
A highly compact, one diode–one resistor (1D–1R) nanopillar device architecture for SiOx-based ReRAM is fabricated using nanosphere lithography (NSL). AC-pulse response in 50 ns regime, multibit operation, and good reliability are demonstrated. The NSL process provides a fast and economical approach to large-scale patterning of high-density 1D–1R ReRAM with good potential for use in future applications.
Stateful Boolean Logic and Synaptic Post-Moore Computing, and Bio-Inspiration Biomimetic Systems in Electronic Devices
Stateful Boolean Logic and Synaptic Post-Moore Computing, and Bio-Inspiration Biomimetic Systems in Electronic Devices
A highly-robust and power-efficient (fJ-level) 1D-1R device architecture for a synaptic electric device can also be demonstrated by intrinsic SiOx-based ReRAMs. The resistive switching elements and Si diodes are fabricated using conventional photolithography and were integrated with a standard CMOS process, representing a critical milestone regarding the potential use of SiO2-based material as a synaptic electric device in future commercial product. By studying the multilevel states available in DC and AC-pulse response mappings, biological synaptic behaviors such as long-term potentiation (LTP), long-term depression (LTD) and spike-timing-dependent plasticity (STDP) can be demonstrated. Also, implication (IMP) operations are demonstrated in a circuit with two SiOx-based memristors and a CMOS transistor. Specifically, a circuit with two 1D-1R elements and a transistor are designed to perform the IMP operations. This achievement suggests that the memristor-enabled logic circuit is most suitable for low-power and high-density applications, as well as a simple and robust approach to realize programmable memcomputing (Memristor + Computing) and in-memory process chips compatible with large-scale CMOS manufacturing technology. (Results are published in 2015-2018, Scientific Reports, IEEE Transaction of Electron Device, Journal of Materials Chemistry C, Nanoscale etc.)
(Left) Undesired sneak paths suppress, “Selector”, by Metal-Semiconductor-Metal (MSM) structure (Ti − a-Si − Ti and Ni − a-Si − Ni). In this work, we present silicon process compatible, stable and reliable (>10^8 cycles), high non-linearity ratio at a half-read voltage (>5 × 10^5), high speed (<60 ns), and low operating voltage (<3V) back-to-back Schottky diodes.
(Right) Metal–insulator-transition characteristics in the VOx layer, which is suitable for integration with RRAM devices in a 1S-1R array.
Selector Integration for Large-Scale Low Power Emerging Memory Array Design
Selector Integration for Large-Scale Low Power Emerging Memory Array Design
Non-linear (NL) devices which can provide very low current series through unselected cells while pass enough current to selected cells are highly desirable for realizing large scale ReRAM arrays. This structure is usually called as one-selector-one-resistor (1S-1R). Compared one-transistor-one-resistor (1T-1R), the benefit of 1S-1R over 1T-1R is that there is no area overhead for universal leakage-current-limiting devices, and making ReRAM capable of building memory arrays with higher density than flash memory. I have reported highly NL, fast, robust, low operating voltage, sufficient current density, good scalability, and simple fabrication processes with symmetric back-to-back Schottky diodes by metal-semiconductor-metal (MSM) structure, Vanadium oxide (VOx-based Mott-Insulator Transition), and Nb-doped SrTiO3 (strongly-correlated perovskite oxides). (Published in 2016-2019, Nanoscale etc.)
This work presents a material implication implementation using SiOx based unipolar memristors. The implication function and its truth table were well implemented using both positive and negative voltages for load resistor bias. This work demonstrates that unipolar SiOx based memristors are suitable for logic operations.
We realize a device with biological synaptic behaviors by integrating SiOx memristor with Si diodes. Minimal synaptic power consumption due to sneak-path current is achieved and the capability for spike-induced synaptic behaviors (LTP, LTD, and STDP) is demonstrated, representing critical milestones for the use of SiO2–based materials in future neuromorphic computing applications.
Flexible Electronics with Embedded Memory and Synapse-mimic Systems
Flexible Electronics with Embedded Memory and Synapse-mimic Systems
I propose a memory-sensor system by developing the memory and sensors by utilizing the composite materials systems i.e. metal, insulator, polymer into an integrated system. The multimaterial, multiparametric smart systems can be intimately but noninvasively applied on human skin to measure ECG, EMG, EEG, skin temperature, skin hydration, respiratory rate, and joint bending. Meanwhile, a high-throughput manufacturing method is proposed. The “cut-and-paste” method enables completely dry, benchtop, freeform, and portable manufacture of ESS within minutes, without using any vacuum facilities or chemicals. In addition to ESS, the “cut-and-paste” manufacturing method is expected to be useful for the manufacture of other stretchable devices including stretchable circuit boards which house rigid IC chips and deployable structure health monitoring sensor networks. (Preliminary results are published in Advanced Materials (2015))
Multifunctional epidermal sensor systems (ESS) are manufactured with a highly cost and time effective, benchtop, and large‐area “cut‐and‐paste” method. The ESS made out of thin and stretchable metal and conductive polymer ribbons can be noninvasively laminated onto the skin surface to sense electrophysiological signals, skin temperature, skin hydration, and respiratory rate. "“Cut‐and‐Paste” Manufacture of Multiparametric Epidermal Sensor Systems", Advanced Materials 27, 6423 (2015).
Alternative Channel High-K Quantum-Well MOSFETs
Alternative Channel High-K Quantum-Well MOSFETs
Excellent device performance of 3D In0.53Ga0.47As gate-wrap-around field-effect-transistors (GWAFETs) have been demonstrated by a novel device design with innovative fabrication processes. The study of the fabricated 3D In0.53Ga0.47As GWAFETs with fin width (Wfin) of 40 nm to 200 nm shows that the device with narrower Wfin exhibits higher drive current, transconductance and better short channel effect (SCE) control. A good combination of current drive and subthreshold characteristics has been achieved by the device with 40 nm Wfin and 140 nm Lg, and it delivers Ion of 600 μA/μm at Vd=1 V and Vg-Vth=1 V, subthreshold swing (SS) of 80 mV/dec, and drain induced barrier lowering (DIBL) of 20mV/V. The observed significant improvement in electrostatic control was achieved by our GWA device architecture.
[1] Fei Xue, Aiting Jiang, Yen-Ting Chen, Yanzhen Wang, Fei Zhou, Yao-Feng Chang, Jack C. Lee, “Excellent device performance of 3D In0.53Ga0.47As gate-wrap-around field-effect-transistors with high-k gate dielectrics”, IEEE International Electron Devices Meeting (IEDM), December 10-13 (2012).[pdf]
[2] Fei Zhou, Fei Xue, Yao-Feng Chang*, and Jack C. Lee, “III-V Gate-Wrap-Around Field-Effect-Transistors with High-k Gate Dielectrics”, IEEE Device Research Conference, June 22-25 (2014).[*Invited talk] [Website]
Invited talk in IEEE Device Research Conference 72nd, 2014.
Schematic structure of 3D In0.53Ga0.47As GWAFETs.
Transfer characteristics of In0.53Ga0.47As GWAFETs.
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