Publications

Books

Book chapters

• Rohit Sharma and Atul Kumar Nishad, "Performance Evaluation of AsF5-intercalated Top Contact Multilayer Graphene Nanoribbons for Deeply Scaled Interconnects," in High-Speed and Lower Power Technologies, Choi Jung Han, Iniewski Krzysztof (Eds), CRC Press, 2017.

• Rohit Sharma and Kiyoung Choi, “Emerging Interconnect Technologies for 3D Networks-on-Chip,” in Design of 3D Integrated Circuits and Systems, Rohit Sharma and Krzysztof Iniewski (Eds.), CRC Press, 2014.

• Rohit Sharma, Rajarshi Saha and Paul Kohl, “Low-Loss,High-Performance Chip-to-Chip Electrical Connectivity using Air-Clad Copper Interconnects,” in High-speed Photonics Interconnects, Lukas Chrostowski and Krzysztof Iniewski (Eds.), CRC Press, 2013.

Patents 

• Indian patent granted: “An embedded system for analysis of microstrip-like interconnects”, (Patent no. 319102), 2019.

• Indian patent granted: “Trolley System, Device and Method for Controlling Navigation of the Trolley System”, (Patent no. 531011), 2024.

• Indian patent granted: “A three-dimensional folded capacitive crossbar array system” (Patent No: 565891), 2024. 

• US patent application titled “Voltage Regulator” (Patent No: 63/648,449), 2024.

• Indian patent application titled “Drafting patent application for Sensor-based, economical Hand Hygiene Prompt device for use in the Open bay design ICUs: HHP-OICU”, 2025.

Selected Journals

1. Suyash Kushwaha, Chintu Bhaskara Rao, Shamini P R, Sourajeet Roy, and Rohit Sharma, “Performance Enhanced Copper- Graphene Hetero Interconnect Structures in Crossbar Arrays for Neuromorphic Computing,” IEEE Journal on Multiscale and Multiphysics Computational Techniques, vol. 10, pp. 379-387, 2025.

2. Surila Guglani, Asha Kumari Jakhar, Km Dimple, Ankit Sukhija, Avirup Dasgupta, Rohit Sharma, Brajesh Kumar Kaushik, and Sourajeet Roy, “Artificial Neural Networks with Fast Transfer Learning for Statistical Signal Integrity Analysis of MWCNT and MLGNR Interconnect Networks”, IEEE Transactions on Electromagnetic Compatibility, vol. 66, no. 3, pp. 939-948, 2024. 

3. Yiliang Guo, Xiaofan Jia, Xingchen Li, Yifan Wang, Rahul Kumar, Rohit Sharma, and Madhavan Swaminathan “Extrapolation with Range Determination of 2D Spectral Transposed Convolutional Neural Network for Advanced Packaging Problems”, IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 13, no. 10, pp. 1533-1544, 2023. 

4. Suyash Kushwaha, Nastaran Soleimani, Felipe Treviso, Rahul Kumar, Riccardo Trinchero, Flavio Canavero, Sourajeet Roy, and Rohit Sharma, “Comparative Analysis of Prior Knowledge Based Machine Learning Metamodels for Modeling Hybrid Copper-Graphene On-Chip Interconnects”, IEEE Transactions on Electromagnetic Compatibility, vol. 64, no. 6, pp. 2249-2260, 2022. 

5. Rahul Kumar, S. S. Likith Narayan, Somesh Kumar, Sourajeet Roy, Brajesh Kumar Kaushik, Ramachandra Achar and Rohit Sharma, “Knowledge Based Neural Networks for Fast Design Space Exploration of Hybrid Copper-Graphene On-Chip Interconnect Networks”, IEEE Transactions on Electromagnetic Compatibility, vol. 64, no. 1, pp. 182-195, 2022.

Selected Conferences

1. S. Kushwaha, C. B. Rao, S. P R, S. Roy and R. Sharma, "Impact of Scaling on Large Crossbar Arrays for Neuromorphic Applications," 2025 IEEE 29th Workshop on Signal and Power Integrity (SPI), Gaeta, Italy, 2025, pp. 1-4.

2. Sherin A. Thomas, S. Kushwaha, Rohit Sharma, D. M. Das, “Modeling & Comparing the Impact of Resistive and Capacitive Crossbar Associated Parasitics of Neuromorphic Circuits”, 31st International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES), Gdansk, Poland, 2024, pp. 171-176. [Awarded Best Paper]

3. Suyash Kushwaha, Surila Guglani, Nastaran Soleimani, Sunil Pathania, Somesh Kumar, Riccardo Trinchero, Sourajeet Roy and Rohit Sharma, “Space Mapped Neuromodeling for Fast & Accurate Signal Integrity Analysis of Rough On-chip Copper Interconnects”, 2023 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS), Rose-Hill, Mauritius, 2023, pp. 1-3.

4. Sunil Pathania, Suyash Kushwaha, Somesh Kumar, Mallikarjun Vasa, Ashish Shrivastava, Vijender Kumar, Bhyrav Mutnury, and Rohit Sharma “An Efficient Electrical-Thermal Co-Design Methodology for Analysis of High-Speed PCB Interconnects”, 2023 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO), Winnipeg, Canada, 2023, pp. 154-157.

5. Sherin A. Thomas, S. K. Vohra, S. Kushwaha, R. Sharma and D. M. Das, "Modeling and Analysis of CMOS-based Folded Memristive Crossbar Array for 3D Neuromorphic Integrated Circuits," 2023 IEEE 73rd Electronic Components and Technology Conference (ECTC), Orlando, USA, 2023, pp. 960-966.