Analog LED fader using FET square law

Introduction

Another approach to linearize the brightness perception of a LED is using the FET square law to get a semi-exponential/square current through the LED when inputting a linear ramp to the circuit.

The drain current (Id) of a saturated FET has a quadratic (parabolic) relation to the gate voltage (Vgs) minus the threshold voltage (Vth). So Id relates to (Vgs-Vth) ^2.

This quadratic relation can also be used to linearize the logarithmic changing of LED brightness when increasing the current through the LED.

Circuit

In the figure below, you find the circuit using a PUT to generate a rather linear triangular waveform. At node (1) in the circuit, this triangular waveform is present.
R4 charges C1 and R3 discharges C1. So R4 determines the steepness of the positive slope and R3 determines the steepness of the falling slope.
Q3 and Q4 form a MOSFET differential amplifier which has a very high input impedance, buffering the triangular waveform that is present over C1 so it is not influenced too much.
The gate of Q4 is set to approximately 2,7V (with R8 and R9) which is around the gate threshold voltage of the MOSFET. Q3 will start conducting as soon as the voltage at node (1) reaches its gate threshold voltage, which is about 2V. The current through the LED will not increase linear with the triangular input voltage applied. Instead, it will follow a square curve due to the FET square law, that defines the relation between the gate threshold voltage and the drain current of the FET. The result is that the fading in and out of the LED intensity will be perceived as a pretty linear.
With C1 = 33uF, the period of the triangular waveform will be about 3 seconds, meaning 1,5 sec for fade in and 1,5 sec for fade out.
When you want a different frequency, just change C1.
Use a high efficiency LED to get enough brightness even with currents below 10mA.
Use a decent electrolytic capacitor with a low ESR and leakage for C1. The other components are not critical.
The circuit is designed for a power supply of 5V. When using higher supply voltages, R5 and R7 need to be adapted.
All resistors are 0.25W/10%.

Click here to download the LTSpice simulation file for the FET square law circuit

The oscilloscope picture below shows the voltage at node 1 (voltage over C1) :

The oscilloscope picture below shows the voltage over R5 (=1K), that represents the current through the LED :

Pictures

Video