F. Gaffiot, K. Vuorinen, F. Mieyeville, I. O'Connor, G. Jacquemod, "Behavioral modeling for hierarchical simulation of optronic systems," IEEE Transactions on Circuits and Systems - II. Analog and Digital Signal Processing, vol. 46, no. 10, pp. 1316-1322, October 1999 

B. Stefanelli, I. O'Connor, L. Quiquerez, A. Kaiser, D. Billet, "An analog beam-forming circuit for ultrasound imaging using switched-current delay lines," IEEE Journal of Solid-State Circuits, vol. 35, no. 2, pp. 202-211, February 2000

I. O'Connor, A. Kaiser, "Automated synthesis of switched-current cells," IEEE Transactions on Computer Aided Design, vol. 19, no. 4, pp. 413-424, April 2000

P. Bontoux, I. O'Connor, F. Gaffiot, X. Letartre, G. Jacquemod, "Behavioral modeling and simulation of optical integrated devices," Special Section of Analog Integrated Circuits and Signal Processing, vol. 29, issue 1/2, pp. 37-47, October 2001

G. Tosik, F. Gaffiot, Z. Lisik, I. O'Connor, F. Tissafi-Drissi, "Power dissipation in optical and metallic clock distribution networks in new VLSI technologies," Electronics Letters, vol. 4, no. 3, pp. 198-200, 5 February 2004

A. Kazmierczak, M. Brière, E. Drouard, P. Bontoux, P. Rojo-Romeo, I. O'Connor, X. Letartre, F. Gaffiot, R. Orobtchouk, T. Benyattou, "Design, Simulation and Characterization of a Passive Optical Add-Drop Filter in Silicon-On-Insulator Technology," Photonics Technology Letters, vol. 17, no. 7, pp. 1447 – 1449, July 2005

J. Liu, I. O'Connor, D. Navarro, F. Gaffiot, "Design of a Novel CNTFET-based Reconfigurable Logic Gate," Electronics Letters, vol. 43, no. 9, pp. 514-516, 26 April 2007

I. O'Connor, F. Tissafi-Drissi, F. Gaffiot, J. Dambre, M. De Wilde, D. Stroobandt, J. Van Campenhout, D. Van Thourhout, "Systematic Simulation-Based Predictive Synthesis of Integrated Optical Interconnect," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 15, no. 8, pp. 927-940, August 2007

A. Kazmierczak, E. Drouard, M. Brière, P. Rojo-Romeo, X. Letartre, I. O'Connor, F. Gaffiot, Z. Lisik, "Optimization of an integrated optical crossbar in SOI technology for optical networks on chip," Journal of Telecommunications and Information Technology, 3/2007, pp. 109-114, September 2007

I. O'Connor, J. Liu, F. Gaffiot, F. Prégaldiny, C. Lallement, C. Maneux, J. Goguet, S. Frégonèse, T. Zimmer, L. Anghel, T. Dang, R. Leveugle, "CNTFET Modeling and Reconfigurable Logic Circuit Design," IEEE Trans. Circuits and Systems – I. Regular Papers, vol. 54, no. 11, pp. 2365-2379, November 2007

I. Hassoune, I. O’Connor, "Double-Gate MOSFET Based Reconfigurable Cells," Electronics Letters, vol. 43, no. 23, pp. 1273-1274, 8 November 2007

I. Hassoune, X. Yang, I. O’Connor, D. Navarro, "Ultra-Low Power Full Adder Circuit Using SOI Double-Gate MOSFET Devices," Electronics Letters, vol. 44, no. 18, pp. 1095-1096, 28 August 2008

I. O'Connor, J. Liu, D. Navarro, R. Daviot, N. Abouchi, P.E. Gaillardon, F. Clermidy, "Molecular electronics and reconfigurable logic," Int. J. Nanotechnology, vol. 7, nos. 4/5/6/7/8, pp. 367-382, 2010

I. Hassoune, D. Flandre, I. O’Connor, J.D. Legat, "ULPFA: a new efficient design of a power aware full adder," IEEE Trans. Circuits and Systems – I. Regular Papers, vol. 57, no. 8, pp. 2066–2074, Aug. 2010

S. Le Beux, J. Trajkovic, I. O'Connor, G. Nicolescu, G. Bois, P. Paulin, “Multi-Optical Network on Chip for Large Scale MPSoC”, IEEE Embedded Systems Letters, vol. 2, no. 3, pp. 77-80, September 2010

I. O’Connor (Guest Editor), "Introduction to the special issue on TAISA 2007," Analog Integrated Circuits and Signal Processing, vol. 65, no. 3, pp. 343-344, December 2010

P.E. Gaillardon, F. Clermidy, I. O’Connor, J. Liu, R. Daviot, N. Abouchi, M. Amadou, G. Nicolescu, "Matrix Nanodevice-Based Architectures and Associated Functional Mapping Method," ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 7, no. 1, January 2011

M.H. Ben-Jamaa, P.E. Gaillardon, F. Clermidy, I. O’Connor, D. Sacchetto, G. De Micheli, Y. Leblebici, "Silicon Nanowire Arrays and Crossbars: Top-Down Fabrication Techniques and Circuit Applications," ASP Science of Advanced Materials (SAM), Special Issue on "Nano-Engineered Silicon: Technology and Applications", vol. 3, p. 466–476, 2011

M. H. Ben Jamaa, P.E. Gaillardon, S. Frégonèse, M. De Marchi, G. De Micheli, T. Zimmer, I. O’Connor, F. Clermidy, "FPGA Design with Double-Gate Carbon Nanotube Transistors," ECS Transactions - CSTIC 2011 "Emerging Semiconductor Technologies", vol. 34, March 2011

R. Dahmani, O. Valorge, F. Sun, S. Labiod, F. Calmon, S. Latreche, I. O’Connor; C. Gontrand, "Insights into Three-Dimensional Radiofrequency Circuits Connections", Journal of Computer Technology and Application, vol. 2, pp. 456-470, 2011

W. Du, D. Navarro, F. Mieyeville, I. O'Connor, "IDEA1: A Validated SystemC-based System-level Design and Simulation Environment for Wireless Sensor Networks," EURASIP Journal on Wireless Communications and Networking (DOI: 10.1186/1687-1499-2011-143, October 2011)

F. Yengui, L. Labrak, F. Frantz, R. Daviot, N. Abouchi, I. O’Connor, "A hybrid GA–SQP algorithm for analog circuits sizing," Scientific Research Circuits and Systems Journal, vol. 3, no. 2, pp. 146-152, April 2012 (DOI: 10.4236/cs.2012.32019)

F. Frantz, L. Labrak, I. O'Connor, "3D IC floorplanning: automating optimization settings and exploring new thermal-aware management techniques," Elsevier Microelectronics Journal, vol. 43, no. 6, pp. 423-432, June 2012

H. Filiol, I. O'Connor, D. Morche, "Analog IC variability bound estimation using the Cornish-Fisher expansion", IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 31, no. 9, pp. 1457-1461, Sept. 2012

P.E. Gaillardon, D. Sacchetto, G. Beneventi, M. H. Ben Jamaa, L. Perniola, F. Clermidy, I. O’Connor, G. De Micheli, “Design and Architectural Assessment of 3-D Resistive Memory Technologies in FPGAs,” IEEE Trans. Nanotechnology, vol. 12, no. 1, pp. 40-50, Jan. 2013

S. Le Beux, I. O'Connor, G. Nicolescu, G. Bois, P. Paulin, "Reduction methods for adapting optical network on chip topologies to 3D architectures," Elsevier Microprocessors and Microsystems - Embedded Hardware Design, vol. 37, no. 1, pp. 87-98, Feb. 2013

M. Galos, F. Mieyeville, D. Navarro, I. O’Connor, "SystemC fine-grained HW–SW fully heterogeneous WSN simulation and UML metamodel behavioural extraction," Analog Integrated Circuits and Signal Processing, vol. 77, no. 2, pp. 123-133, Sept. 2013

N. Zhu, I. O'Connor, "iMASKO: A Genetic Algorithm Based Optimization Framework for Wireless Sensor Networks," J. Sensor and Actuator Networks, vol. 2, no. 4, pp. 675-699, Oct. 2013

D. Navarro, Z. Feng, I. O'Connor, "Image Toolbox for CMOS Image Sensors Fast Simulation," Global Journal of Computer Science and Technology – Graphics & Vision, vol. 13, no. 3, 2013

K. Jabeur, I. O'Connor, N. Yakymets, "Functions classification approach to generate reconfigurable fine-grain logic based on Ambipolar Independent Double Gate FET (Am-IDGFET)," Elsevier Microelectronics Journal, vol. 44, no. 12, pp. 1316-1327, Dec. 2013

C. Baudot, J.M. Fédéli, D. Marris-Morini, B. Caire-Remonnay, L. Virot, S. Olivier, A. Myko, P. Grosse, G. Grand, B. Ben Bakir, J.M. Hartmann, N. Allouti, S. Barnola, C. Vizioz, M. Rivoire, A. Seignard, N. Vulliet, A. Souhaité, S. Messaoudène, I. O’Connor, L. Vivien, S. Menezo, F. Boeuf, "Introducing photonic devices for 40Gbits/s wavelength division multiplexing transceivers on 300-mm SOI wafers using CMOS processes," Integrated Optics: Devices, Materials, and Technologies XVIII, ed. J.E. Broquin, G. Nunzi Conti, Proc. SPIE, vol. 8988, pp. 89880O-1 – 89880O-16, Mar. 2014 (DOI: 10.1117/12.2042496)

S. Le Beux, H. Li, G. Nicolescu, J. Trajkovic, I. O’Connor, "Optical Crossbars on Chip, A Comparative Study based on Worst-Case Losses," in Wiley Concurrency and Computation: Practice and Experience (CCPE), Special Issue on Silicon Photonics, 2014

W. Du, F. Mieyeville, D. Navarro, I. O'Connor, L. Carrel, "Modeling and simulation of networked low-power embedded systems: a taxonomy," EURASIP Journal on Wireless Communications and Networking, 2014:106, Jul. 2014

P.E. Gaillardon, G. De Micheli, I. O'Connor, S. Mitra, T. Ernst, "Introduction to the special section on functionality-enhanced devices", IEEE Trans. Nanotechnology, vol. 13, no. 6, p. 1019, Nov. 2014

K. Jabeur, I. O'Connor, S. Le Beux, "Ambipolar Independent Double Gate FET (Am-IDGFET) for the Design of Compact Logic Structures," IEEE Trans. Nanotechnology, vol. 13, no. 6, pp. 1063-1073, Nov. 2014

J.E. Lorival, F. Calmon, F. Sun, F. Frantz, C. Plossu, M. LeBerre, I. O’Connor, O. Valorge, J. Charbonnier, D. Henry, C. Gontrand, "An efficient and simple compact modeling approach for 3-D interconnects with IC's stack global electrical context consideration," Microelectronics Journal, vol. 46, no. 1, pp.153–165, Jan. 2015

N. Yakymets, I. O’Connor, K. Jabeur, S. Le Beux, "Multi-Level Mapping of Nanocomputer Architectures Based on Hardware Reuse," IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), Special Issue on Computing in Emerging Technologies, vol. 5, no. 1, pp. 88-97, Mar. 2015

O. Dubray, A. Abraham, K. Hassan, S. Olivier, D. Marris-Morini, L. Vivien, I. O’Connor, S. Menezo, "Electro-optical ring modulator: an ultra-compact model for the comparison and optimization of PN, PIN, and capacitive junction," IEEE J. Selected Topics in Quantum Electronics, 2016, vol. 22, no. 6, Nov-Dec 2016 (DOI: 10.1109/JSTQE.2016.2564103)

H. Li, S. Le Beux, M.J. Sepulveda Florez, I. O'Connor, "Energy-Efficiency Comparison of Multi-Layer Deposited Nanophotonic Crossbar Interconnects," ACM J. Emerging Technologies in Computing Systems, Association for Computing Machinery, vol. 20, Jul. 2017 (DOI: 10.1145/3094125)

S. Le Beux, P.V. Gratz, I. O'Connor, "Guest Editorial: Emerging Technologies and Architectures for Manycore Computing Part 1: Hardware Techniques," IEEE Trans. Multi-Scale Computing Systems, vol. 4, no. 2, pp. 97-98, Apr-Jun 2018 (DOI: 10.1109/TMSCS.2018.2826758)

H. Li, A. Fourmigue, S. Le Beux, I. O'Connor, G. Nicolescu, "Towards maximum energy efficiency in nanophotonic interconnects with thermal-aware on-chip laser tuning," IEEE Trans. Emerging Topics in Computing, vol. 6, no. 3, pp. 343-356, Jul. – Sep. 2018 (DOI: 10.1109/TETC.2016.2561623)

J. Luo, C. Killian, S. Le Beux, D. Chillet, O. Sentieys, I. O’Connor, "Offline optimization of wavelength allocation and laser power in nanophotonic interconnects," ACM J. Emerging Technologies in Computing Systems (JETC), vol. 14, no. 2, Jul. 2018 (DOI: 10.1145/3178453)

Q. An, S. Le Beux, I. O'Connor, J.O. Klein, "A comprehensive compact model for the design of all-spin-logic based circuits," Microelectronics Journal, Nov. 2018 (DOI: 10.1016/j.mejo.2018.11.003)

Y. Wang, A. Aouina, H. Li, I. O'Connor, G. Nicolescu, S. Le Beux, "Thermal-Aware Design Method for Laser Group Control in Nanophotonic Interconnects," IEEE Trans. Very Large Scale Integration (VLSI) Systems, pp. 1-5, Jan. 2019 (DOI: 10.1109/TVLSI.2018.2888589)

A. Levisse, P.E. Gaillardon, B. Giraud, I. O'Connor, J.P. Noel, M. Moreau, J.M. Portal, "Resistive Switching Memory Architecture Based on Polarity Controllable Selectors," IEEE Trans. Nanotechnology, vol. 18, pp. 183-194, 2019 (DOI: 10.1109/TNANO.2018.2887140)

E. Fusella, M. Nikdast, I. O'Connor, J. Flich, S. Pasricha, "Guest Editors’ Introduction: Emerging Networks-on-Chip – Designs, Technologies, and Applications," ACM J. Emerging Technologies in Computing Systems, 2019 (DOI: 10.1145/3173463)

A. Perodou, A. Korniienko, G. Scorletti, M. Zarudniev, J.B. David, I. O’Connor, "Frequency Design of Lossless Passive Electronic Filters: a state-space formulation of the direct synthesis approach," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 1, Jan. 2021 (DOI: 10.1109/TCSI.2020.3034300)

E. Dupuis, D. Novo, I. O'Connor, A. Bosio, "CNN weight sharing based on a fast accuracy estimation metric," Microelectronics Reliability, 122(12):114148, July 2021 (DOI: 10.1016/j.microrel.2021.114148)

F. Fummi, I. O’Connor, "Holding Conferences Online in Pandemic Times: The DATE Experience," IEEE Design & Test, vol. 38, no. 4, pp. 128-130, August 2021 (DOI: 10.1109/MDAT.2021.3078673)

C. Mukherjee, A. Poittevin, I. O'Connor, G. Larrieu, C. Maneux, "Compact modeling of 3D vertical junctionless gate-all-around silicon nanowire transistors towards 3D logic design," Solid-State Electronics, 183(9):108125, September 2021 (DOI: 10.1016/j.sse.2021.108125)

A. Ruospo, E. Sanchez, M. Traiola, I. O’Connor, A Bosio, "Investigating data representation for efficient and reliable Convolutional Neural Networks," Microprocessors and Microsystems, vol. 86, 104318, October 2021 (DOI: 10.1016/j.micpro.2021.104318)

C. Marchand, I. O'Connor, M. Cantan, S. Slesazeck, T. Mikolajick, "A FeFET-based hybrid memory accessible by content and by address," IEEE Journal of Exploratory Solid-State Computational Devices and Circuits, vol. 8, no. 1, pp. 19-26, June 2022 (DOI: 10.1109/JXCDC.2022.3168057)

M. Abdalla, C. Zrounba, R. Cardoso, P. Jimenez, G. Ren, A. Boes, A. Mitchell, A. Bosio, I. O'Connor, F. Pavanello, "Minimum complexity integrated photonic architecture for delay-based reservoir computing," Optics Express, 31(7), pp. 11610-11623, 2023 (DOI: 10.1364/OE.484052)

C. Cakirlar, M. Simon, G. Galderisi, I. O’Connor, T. Mikolajick, J. Trommer, "Cross-Shape Reconfigurable Field Effect Transistor for Flexible Signal Routing," Materials Today Electronics, vol. 4, June 2023, 100040 (DOI: 10.1016/j.mtelec.2023.100040)

I. O’Connor, R. Wille, A. Pimentel, V. Bertacco, "Post-Pandemic Conferences: The DATE Experience," IEEE Design & Test, vol. 40, no. 5, pp. 104-112, October 2023 (DOI: 10.1109/MDAT.2023.3287930)

S. Mannaa, A. Poittevin, C. Marchand, D. Deleruyelle, B. Deveautour, A. Bosio, I. O’Connor, C. Mukherjee, Y. Wang, H. Rezgui, M. Deng, C. Maneux, J. Müller, S. Pelloquin, K. Moustakas, G. Larrieu, "3D Logic circuit design oriented electrothermal modeling of vertical junctionless nanowire FETs," IEEE J. Exploratory Solid-State Computational Devices and Circuits, August 2023, (DOI: 10.1109/JXCDC.2023.3309502)

A. Ram, K. Maity, C. Marchand, A. Mahmoudi, A.R. Kshirsagar, M. Soliman, T. Taniguchi, K. Watanabe, B. Doudin, A. Ouerghi, S. Reichardt, I. O’Connor, J.F. Dayen, "Reconfigurable Multifunctional van der Waals Ferroelectric Devices and Logic Circuits," ACS Nano, October 2023 (DOI: 10.1021/acsnano.3c07952)