Journals
sci indexed
15. 2020 - March 11 [Acceptance]
Application of Logical Sub-networking in Congestion-aware Deadlock-free SDmesh Routing
TUHIN SUBHRA DAS, PRASUN GHOSAL, NAVONIL CHATTERJEE, ARNAB NATH, AKASH BANERJEE, and SUBHOJYOTI KHASTAGIR
ACM Transactions on Embedded Computing Systems, ACM, [I.F. 1.367]
Cite this article as:
TUHIN SUBHRA DAS, PRASUN GHOSAL, NAVONIL CHATTERJEE, ARNAB NATH, AKASH BANERJEE, and SUBHOJYOTI KHASTAGIR, Application of Logical Sub-networking in Congestion-aware Deadlock-free SDmesh Routing, ACM Transactions on Embedded Computing Systems, doi:
URL:
14. 2020 - January 26 [Acceptance]
A Low Latency Energy Efficient BFT Based 3D NoC Design With Zone Based Routing Strategy
Avik Bose, and Prasun Ghosal
Journal of Systems Architecture, ELSEVIER, [I.F. 1.211]
Cite this article as:
Avik Bose, and Prasun Ghosal, A Low Latency Energy Efficient BFT Based 3D NoC Design With Zone Based Routing Strategy, Journal of Systems Architecture, doi:
URL:
13. 2019 - August 07 [Acceptance]
Dynamic Task Mapping and Scheduling with Temperature-Awareness on Network-on-Chip based Multicore Systems
Suraj Paul, Navonil Chatterjee, and Prasun Ghosal
Journal of Systems Architecture, ELSEVIER, [I.F. 1.211]
Cite this article as:
Suraj Paul, Navonil Chatterjee, and Prasun Ghosal, Dynamic Task Mapping and Scheduling with Temperature-Awareness on Network-on-Chip based Multicore Systems, Journal of Systems Architecture, doi:
URL:
12. 2018 - November 25 [Acceptance]
Performance centric Design of Subnetwork based Diagonal Mesh NoC
Tuhin Subhra Das, and Prasun Ghosal
International Journal of Electronics, Taylor & Francis [I.F. 0.939]
Cite this article as:
Tuhin Subhra Das, and Prasun Ghosal, Performance centric Design of Subnetwork based Diagonal Mesh NoC, International Journal of Electronics [Accepted].
URL:
11. 2018 - October 11 [Acceptance]
A Permanent Fault Tolerant Dynamic Task Allocation Approach for Network-on-Chip based Multicore Systems
Suraj Paul, Navonil Chatterjee, and Prasun Ghosal
Journal of Systems Architecture, ELSEVIER, 12 October 2018, Published (Online) [I.F. 1.211]
Cite this article as:
Suraj Paul, Navonil Chatterjee, and Prasun Ghosal, A Permanent Fault Tolerant Dynamic Task Allocation Approach for Network-on-Chip based Multicore Systems, Journal of Systems Architecture, doi: 10.1016/j.sysarc.2018.10.003
URL: DOI
10. 2018 - May 21 [Acceptance]
Latency, Throughput and Power Aware Adaptive NoC Routing on Orthogonal Convex Faulty Region
Munshi Mostafijur Rahaman, Prasun Ghosal, and Tuhin Subhra Das
Journal of Circuits, Systems and Computers, World Scientific, May 2018, Published (Online) [I.F. 0.595]
Cite this article as:
Munshi Mostafijur Rahaman, Prasun Ghosal, Tuhin Subhra Das, Latency, Throughput and Power Aware Adaptive NoC Routing on Orthogonal Convex Faulty Region, Journal of Circuits, Systems, and Computers, doi: 10.1142/S0218126619500555
URL: DOI
9. 2017 - Nov 28 [First Online]
Computing in Ribosome : Logic Gates Implementation using mRNA-Ribosome System
Pratima Chatterjee, Prasun Ghosal
CSI Transactions on ICT, Springer, March 2018, Volume 6, Issue 1, pp 39–50
Cite this article as:
Chatterjee, P. & Ghosal, P. CSIT (2018) 6: 39. https://doi.org/10.1007/s40012-017-0183-7
URL: DOI , Springerlink , Researchgate
8. 2017 - July 13
Exploring the Feasibility of a DNA Computer: Design of an ALU using Sticker Based DNA Model
Mayukh Sarkar , Prasun Ghosal, and Saraju P. Mohanty
IEEE Transactions on NanoBioscience, Sept 2017, Volume 6, Issue 6, pp 383–399 [I.F. 2.56]
Cite this article as:
M. Sarkar, P. Ghosal and S. P. Mohanty, "Exploring the Feasibility of a DNA Computer: Design of an ALU Using Sticker-Based DNA Model," in IEEE Transactions on NanoBioscience, vol. 16, no. 6, pp. 383-399, Sept. 2017. doi: 10.1109/TNB.2017.2726682
URL: DOI
7. 2016 - May 10
Minimal Reversible Circuit Synthesis on a DNA Computer
Mayukh Sarkar , Prasun Ghosal, and Saraju P. Mohanty
Natural Computing, Springer, 10 May 2016, Volume 16, Issue 3, pp 463-472 [I.F. 1.310]
Cite this article as:
M. Sarkar, P. Ghosal and S. P. Mohanty, "Minimal Reversible Circuit Synthesis on a DNA Computer," in Natural Computing, Springer, vol. 16, no. 3, pp. 463-472, May 2016. doi: http://dx.doi.org/10.1007/s11047-016-9553-6
URL: DOI
6. 2016 - Jan
Design of a High Performance CDMA Based Broadcast Free Photonic Multi Core Network on Chip
Soumyajit Poddar, Prasun Ghosal, and Hafizur Rahaman
ACM Transactions on Embedded Computing Systems (ACM TECS), Jan 2016, Volume 15, Issue 1, pp 2:1–2:30 [I.F. 1.178]
Cite this article as:
S. Poddar, P. Ghosal, and H. Rahaman , "Design of a High Performance CDMA Based Broadcast Free Photonic Multi Core Network on Chip", in ACM Transactions on Embedded Computing Systems (ACM TECS), vol. 15, no. 1, pp 2:1–2:30, Jan 2016. doi: https://doi.org/10.1145/2839301
URL: DOI
5. 2015 - November
FuzzRoute: A Thermally Efficient Congestion Free Global Routing Method for Three Dimensional Integrated Circuits
Debashri Roy, Prasun Ghosal, and Saraju Mohanty
ACM Transactions on Design Automation of Electronic Systems (ACM TODAES), ACM, Nov 2015, Volume 21, Issue 1, pp 1:1 - 1:38 [I.F. 0.811]
Cite this article as:
Debashri Roy, Prasun Ghosal, and Saraju Mohanty, "FuzzRoute: A Thermally Efficient Congestion Free Global Routing Method for Three Dimensional Integrated Circuits", in ACM Transactions on Design Automation of Electronic Systems (ACM TODAES), vol. 21, no. 1, pp 1:1 - 1:38, Nov 2015. doi: https://doi.org/10.1145/2767127
URL: DOI
4. 2015 - March
Modeling and Analysis of Crosstalk Induced Effects in Multiwalled Carbon Nanotube Bundle Interconnects: An ABCD Parameter Based Approach
Manodipan Sahoo, Prasun Ghosal, and Hafizur Rahaman
IEEE Transactions on Nanotechnology (IEEE TNANO), IEEE, Mar 2015, Volume 14, Issue 2, pp 259-274 [I.F. 1.619]
Cite this article as:
Manodipan Sahoo, Prasun Ghosal and Hafizur Rahaman, "Modeling and Analysis of Crosstalk Induced Effects in Multiwalled Carbon Nanotube Bundle Interconnects: An ABCD Parameter Based Approach", in IEEE Transactions on Nanotechnology (IEEE TNANO), Volume 14, Issue 2, pp 259-274, Mar 2015. doi: https://doi.org/10.1109/TNANO.2014.2388252
URL: DOI
3. 2014 - June 5
Performance Modeling and Analysis of Carbon Nanotube Bundles for Future VLSI Circuit Applications
Manodipan Sahoo, Prasun Ghosal, and Hafizur Rahaman
Journal of Computational Electronics, Springer US, June 2014, Volume 13, Issue 3, pp 673-688 [I.F. 1.372]
Cite this article as:
Manodipan Sahoo, Prasun Ghosal and Hafizur Rahaman, "Performance Modeling and Analysis of Carbon Nanotube Bundles for Future VLSI Circuit Applications", in Journal of Computational Electronics, Volume 13, Issue 3, pp 673-688, June 2014. doi: https://doi.org/10.1007/s10825-014-0587-7
URL: DOI
2. 2014
A Low Power, Low Jitter DLL Based Low Frequency (250 KHz) Clock Generator
Prasun Ghosal, Hafizur Rahaman, Koyel Mukherjee, and Dibyendu Ballabh
International Journal of Signal and Imaging Systems Engineering (Inderscience IJSISE), 2014, Volume 7, Issue 1, pp 3-11 [I.F. 0.40]
Cite this article as:
Prasun Ghosal, Hafizur Rahaman, Koyel Mukherjee, and Dibyendu Ballabh, "A Low Power, Low Jitter DLL Based Low Frequency (250 KHz) Clock Generator", in International Journal of Signal and Imaging Systems Engineering (Inderscience IJSISE), Volume 7, Issue 1, pp 3-11, 2014. doi: https://doi.org/10.1504/IJSISE.2014.057936
URL: DOI
1. 2012 - October
Improved Extended XY On-Chip Routing in Diametrical 2D Mesh NoC
Prasun Ghosal, and Tuhin Subhra Das
International Journal of VLSI design & Communication Systems (VLSICS), Oct 2012, Volume 3, Issue 5, pp 191-200 [I.F. 0.77]
Cite this article as:
Prasun Ghosal, and Tuhin Subhra Das, "Improved Extended XY On-Chip Routing in Diametrical 2D Mesh NoC", in International Journal of VLSI design & Communication Systems (VLSICS), Volume 3, Issue 5, pp 191-200, Oct 2012. doi: https://doi.org/10.5121/vlsic.2012.3516
URL: DOI