Book Chapters

  1. Prasun Ghosal, Tuhin Subhra Das, Soumyajit Poddar, Munshi Mostafijur Rahaman, Avik Bose, "3D NoC: A Promising Alternative for Tomorrow's Nanosystem Design", in Nano-CMOS and Post-CMOS Electronics: Vol 2. Circuits and Design,Edited by S. P. Mohanty and A. Srivastava, The Institute of Engineering and Technology (IET), 2015, ISBN: 978-1-84919-999-5.
  2. Prasun Ghosal, Mayukh Sarkar, Pratima Chatterjee, "A New Paradigm towards Performance Centric Computation beyond CMOS: DNA Computing", in Nano-CMOS and Post-CMOS Electronics: Vol 2. Circuits and Design, Edited by S. P. Mohanty and A. Srivastava, The Institute of Engineering and Technology (IET), 2015, ISBN: 978-1-84919-999-5.
  3. Prasun Ghosal, Satrajit Das, and Arindam Das, “A Novel Algorithm For Obstacle Aware RMST Construction During Routing in 3D ICs”, In Natarajan Meghanathan et al. (Eds.): Advances in Computing and Information Technology, Vol. 2, Advances in Intelligent Systems and Computing Series 177, Springer, pp. 649-658, DOI: 10.1007/978-3-642-31552-7_65, Citation: 1.
  4. Prasun Ghosal, Satrajit Das, and Arindam Das, “A New Class of Obstacle Aware Steiner Routing in 3D Integrated Circuits”, In Natarajan Meghanathan et al. (Eds.): Advances in Computing and Information Technology, Vol. 3, Advances in Intelligent Systems and Computing Series 178, Springer, pp. 697-706, DOI 10.1007/978-3-642-31600-5_68, Citation: 1.
  5. Prasun Ghosal, Arindam Das, and Satrajit Das, “Obstacle Aware RMST Generation Using Non-Manhattan Routing For 3D ICs”, In Natarajan Meghanathan et al. (Eds.): Advances in Computing and Information Technology, Vol. 3, Advances in Intelligent Systems and Computing Series 178, Springer, pp. 657-666, DOI 10.1007/978-3-642-31600-5_64, Citation: 1.
  6. Prasun Ghosal, and Tuhin Subhra Das, “A Novel Routing Algorithm For On-chip Communication in NoC on Diametrical 2D Mesh Interconnection Architecture”, In Natarajan Meghanathan et al. (Eds.): Advances in Computing and Information Technology, Vol. 3, Advances in Intelligent Systems and Computing Series 178, Springer, pp. 667-676, DOI 10.1007/978-3-642-31600-5_65, Citation: 6.
  7. Prasun Ghosal, and Tuhin Subhra Das, "Routing in NoC on Diametrical 2D Mesh Architecture", In H. Rahaman et al. (Eds.): VDAT 2012, LNCS 7373, pp. 381--382. Springer, Heidelberg (2012), DOI 10.1007/978-3-642-31494-0_52, Citation: 2.
  8. Soumyajit Poddar, Prasun Ghosal, Priyajit Mukherjee, Suman Samui, and Hafizur Rahaman, "A Photonic Network on Chip with CDMA Links", In H. Rahaman et al. (Eds.): VDAT 2012, LNCS 7373, pp. 377--378. Springer, Heidelberg (2012), DOI 10.1007/978-3-642-31494-0_50, Citation: 1.
  9. Prasun Ghosal, Hafizur Rahaman, Satrajit Das, Arindam Das, and Parthasarathi Dasgupta, "Obstacle Aware Routing in 3D Integrated Circuits", In P.S. Thilagam et al. (Eds.): ADCONS 2011, LNCS 7135, pp. 450–459, 2012. Springer-Verlag Berlin Heidelberg 2012, DOI 10.1007/978-3-642-29280-4_53, Citation: 3.
  10. Prasun Ghosal, Tuhin Subhra Das, "Routing in Multi-core NoC", In Multicore Technology: Architecture, Reconfiguration and Modeling, CRC Press, ISBN 9781439880630 - CAT# K13790, Series: Embedded Multi-Core Systems, Editors: Muhammad Yasir Qadri & Steve J Sangwine, July 26, 2013, pp. 300-331.
  11. Prasun Ghosal, Soumyajit Poddar, "On Chip Interconnects for Multi-core Architectures", In Multicore Technology: Architecture, Reconfiguration and Modeling, CRC Press, ISBN 9781439880630 - CAT# K13790, Series: Embedded Multi-Core Systems, Editors: Muhammad Yasir Qadri & Steve J Sangwine, July 26, 2013, pp. 285-298.
  12. Maumita Maity, Prasun Ghosal, Debashis De, Reversible Logic Circuit Design Using QCA, In Quantum Dots and Quantum Cellular Automata: Recent Trends and Applications, Nova Science Publishers, Inc., USA.
  13. Prasun Ghosal, Arijit Chakraborty, Amitava Das, Tai-Hoon Kim, Debnath Bhattacharyya, Design of Non-accidental Lane, In Advances in Computational Intelligence, Man-Machine Systems and Cybernetics, pp. 188-192, WSEAS Press, 2010.
  14. Prasun Ghosal, Hafizur Rahaman, and Parthasarathi Dasgupta, Uniform Thermal Distributions in Placement of Standard Cells and Gate Arrays: Algorithms and Results, In Progress in VLSI Design and Test 2009, pp. 69-78, Elite Publishing House Pvt Ltd, 2009.