Profile (in English)
Short Biography
Takeshi Ohkawa is an associate professor at Kumamoto University, Japan. He received his M.E. and Ph.D. from Tohoku University in 2000 and 2003 respectively and was engaged in research on dynamically reconfigurable FPGA systems at Tohoku University. He joined National Institute for Advanced Industrial Science and Technology (AIST) in 2004 and started research on distributed embedded systems. He had been working in TOPS Systems Corp since 2009 and joined Utsunomiya University in 2011, and Tokai University in 2019. He joined Research and Education Institute for Semiconductors and Informatics, Kumamoto University in 2023. His current research interests are the design technology of a 3D stacked LSI system and FPGA to realize low-power robots and vision systems.
History
1975 Born in Tokyo
1982-1988 Kugayama-elementary school, Suginami-ku, Tokyo
1988-1991 Miyamae junior high school, Suginami-ku, Tokyo
1991-1994 Fuji High school, Tokyo
1994-1998 Tohoku University, Faculty of Engineering, Dept. of Electronics
1998-2000 Tohoku University, Graduate School of Engineering, Dept. of Electronics, MC
2000-2003 Tohoku University, Graduate School of Engineering, Dept. of Electronics, DC
2003-2004 Tohoku University, Graduate School of Engineering, Dept. of Electronics, Post-doctoral fellow of the 21 century COE program
2004-2007 National Institute for Advanced Industrial Science and Technology, Information Technology Research Institute, Network Middle-ware research group.
2007-2009 National Institute for Advanced Industrial Science and Technology, Information Technology Research Institute, Embedded Real-time System research group
2009-2011 TOPS Systems Corporation
2011-2019 Utsunomiya University, Graduate School of Information Systems Science, Assistant Professor
2019-present Tokai University, Faculty of information and communication, Associate Professor
Research Field
FPGA application to Robotics
FPGA design methodology
Past topics
Courses
2016 sprinf semester (Apr. - Sep.)
Information Engineering Experiments 2 (3rd grade) Hardware Design using HDL
Programming Exercise 3 (3rd grade) (C++, standard input/output)
2015 fall semester (Oct. - Mar.)
Information Engineering Experiments 1 (2nd grade) OP-Amp, Filter
Computer Science Projects (3rd grade) "A introduction for designing SW/HW Cooperative system"
2015 spring semester (Apr. - Sep.)
Information Engineering Experiments 2 (3rd grade) Hardware Design using HDL
Programming Exercise 3 (3rd grade) (C++, standard input/output)
2014 fall semester (Oct. - Mar.)
2014 spring semester (Apr. - Sep.)
Information Engineering Experiments 2 (3rd grade) Hardware Design using HDL
Programming Exercise 1 (2nd grade) (C, sorting)
Programming Exercise 3 (3rd grade) (C++, standard input/output)
2013 fall semester (Oct. - Mar.)
2013 spring semester (Apr. - Sep.)
Information Engineering Experiments 2 (3rd grade) Hardware Design using HDL
Programming Exercise 1 (2nd grade) (C, sorting)
Programming Exercise 3 (3rd grade) (C++, standard input/output)
2012 fall semester (Oct. - Mar.)
2012 spring semester (Apr. - Sep.)
Information Engineering Experiments 2 (3rd grade) Network speed measurement
Programming Exercise 1 (2nd grade) (C, sorting)
Programming Exercise 3 (3rd grade) (C++, standard input/output)
Academic Society Activities
ACM Professional Member since 2007
IPSJ (Information Processing Society Japan) Regular member 2007-
EMB (Embedded System SIG) member
IEICE (The Institute of Electronics, Information and Communication Engineers) Regular member 2012-
RECONF (Reconfigurable System SIG) Technical Committee member, 2012.5-
CPSY (Computer System SIG) Technical Committee member, Secretary 2017.5- (Assistant Secretary,2013.5-2017.4)
IEEE Professional Member since 2015
2012
ICNC2012/WANC Program Committee
2013
FIT2013 Program Comittee
ICFPT2013 Program Committee
CANDAR2013/WANC Program Committee
CANDAR2013/CSA Program Co-chair
2014
The 1st IPSJ SIG-ARC High-Performance Processor Design Contest (2014.1) Executive Committee (Vice Chair)
SWoPP2014 Executive Committee (in charge of CPSY)
SWEST16 (2014) Executive Committee (Program Committee)
FIT2014 Program Committee
ICFPT2014 Program Committee
CANDAR2014/WANC Program Committee
CANDAR2014/CSA Program Co-chair
The 2nd ARC/CPSY/RECONF High-Performance Computer System Design Contest (2014.9) Executive Committee (Chair)
ACSI2015 Program Committee
2015
SWoPP2015 Executive Committee (in charge of CPSY)
SWEST17 (2015) Executive Committee (Program Committee)
FIT2015 Program Committee
ICFPT2015 Program Committee
CANDAR2015 Program Committee
CANDAR2015/WANC Program Committee
CANDAR2015/CSA Program Committee
2016
SWoPP2016 Executive Committee (in charge of CPSY)
SWEST18 (2016) Executive Committee (Program Committee)
FIT2016 Program Committee
The 2nd RECONF/CPSY/ARC/GI Trax Design Competition Executive Committee (FIT2016 Event)
Embedded System Symposium 2016(ESS2016) Executive Committee (Publicity Chair)
CANDAR2016 Program Committee
CANDAR2016/WANC Program Committee
CANDAR2016/CSA Program Co-chair
ICFPT2016 Program Committee
2017
SWoPP2017 Executive Committee (in charge of CPSY)
SWEST19 (2017) Executive Committee (Program Committee)
Embedded System Symposium 2017(ESS2017) General Vice-Chair
CANDAR2017 Program Committee
CANDAR2017/WANC Program Committee
ICFPT2017 Program Committee
2018
SWoPP2018 Executive Committee (in charge of CPSY)
SWEST20 (2018) Executive Committee (Program Committee)
Embedded System Symposium 2018(ESS2018) Program Vice-Chair
CANDAR2018 Program Committee
CANDAR2018/WANC Program Committee
CANDAR2018/CSA Workshop Co-chair
ICFPT2018 Program Committee
ICFPT2018 Design competition local supporter
APRIS2018 General Co-Chair
AWARDS
2004 The 6th LSI Design Award, IP Award
"Flexible Processor - A Dynamically Reconfigurable LSI with reduced configuration data",
Takeshi Ohkawa, Toshiyuki Nozawa, Masanori Fujibayashi, Naoto Miyamoto, Karnan Leo, Masanobu Yamashita, Amir Jamak, Koji Kotani, Soichiro Kita and Tadahiro Ohmi
Tohoku University
May 20, 2004
Research Grants
Principal Investigator (Research Group Leader)
"FPGA Component technology for Cloud Computing Environment with Robots"
Grant name: 2017 KAKENHI grant (C) (JSPS, Japan)
Project Period: Apr. 2017 - Mar. 2020
Organization: Utsunomiya Univ., corporation with Kyushu Institute of Technology and Aizu Univ.
”R&D of FPGA componentization technology for low power robot application"
Grant name: 2015 SCOPE grant for young ICT researcher(MIC, Japan )
Project Period: Aug. 2015 - Mar. 2018
Organization: Utsunomiya Univ.
Documents: Press release
"R&D of image recognition system by networked camera for safe navigation"
Grant name: 2014 A-STEP grant - High-risk challenge type (For recovery from TOHOKU disaster) (JST, Japan)
Project Period: Sep. 2014 - Mar. 2015
Organization: iDI Corp., Utsunomiya Univ., Tokyo Univ. of Marine Science and Technology
Documents: Press release
"System design method of distributed and parallel processing system for FPGA based-on process network"
Grant name: 2013 KAKENHI grant for young researcher (B) (JSPS, Japan)
Project Period: Apr. 2013 - Mar. 2015
Organization: Utsunomiya Univ., corporation with Tokyo Univ. of Marine Science and Technology
Documents: Project web site
"A study for distributed object platform of FPGA for co-design og FPGA-smartphone"
Grant name: 2012 seeds research HOUGA grant (Utsunomiya Univ. Japan)
Project Period: Oct. 2012 - Mar. 2013
Organization: Utsunomiya Univ.
"Ultra-Android: R&D of embedded software platform for multi-core"
Grant name: 2011 SAPOIN (supporting industry) grant (METI, Japan)
Project Period: Sep. 2009 - Nov. 2011
Organization: TOPS Systems Corporation, National Institute for Advanced Industrial Science and Technology
Documents: Annual report, 2009
"R&D of low power object communication ORB Engine for embedded devices"
Grant name: 2007 grant for young researcher (NEDO)
Project Period: Sep. 2007 - Mar. 2009
Organization: National Institute for Advanced Industrial Science and Technology
Documents: Summary (by venturewatch)
Research Group Member
"R&D of Heterogeneous Multichip-stacking Cool System by massive parallel bus for low power information systems"
Grant name: 2009 R&D of innovative energy saving technology (NEDO)
Project Period: May 2009 - Nov. 2011
Organization: TOPS Systems Corporation, National Institute for Advanced Industrial Science and Technology
"R&D of Architecture exploration system by system level power/performance simulation with integration of transmission model
Grant name: 2009 SAPOIN (supporting industry) grant (METI, Japan)
Project Period: 2009年9月~2010年3月
Organization: TOPS Systems Corporation, Keirex Technology