ECE322: Electronics I, Oregon State University
** Handouts and quizzes at bottom of this page
Junior-level electronics class, OSU, Winter 2001. The class met at 8 AM. Keeping the students awake was sometimes challenging. I was able to teach the class and get to my regular job by around 9 AM.
The class had over 100 students in it. I had 5 Graduate Teaching Assistants who did a great job grading papers and conducting the lab sections.
Handouts (PDF File, 13 pages)
Quizzes, Sample Final, and Solutions (PDF File, 23 pages)
Quiz Analytics and Goals. After a significant number of students were unable to answer certain quiz questions, I set a goal for the percentage of the class that would be expected to answer each question correctly. Questions re-appeared on every quiz until the goal was met.
Mid Class Survey. I surveyed students after the first few weeks to determine which teaching methods were working best and which needed improvement. Class surveys are usually conducted at the end of the class, which seems illogical, as it is not possible to make improvements to the class once it has ended
Class presentations (138 pages). These are scans of the overhead sheets I created during class to teach the material. Students asked me to post these to the class web site so they could review the material. They are a bit messy, and the scanner wasn't the best, but they are still readable.
EE410, Physical IC Design, Boise State University
This was a course in physical IC design taught at BSU. In the lab section of the class, students proposed and implemented a circuit design using Cadence software, which was fabricated through the MOSIS service, and then tested by students.
The first year I taught the lab section for Professor Stephen Parke, who is now at Northwest Nazarene University researching printable photovoltaics and integrated circuits.
The next year, I taught the lecture portion and the lab section. I prepared original lectures, quizzes, final exams, and graded the papers.
Labs and Exams
I contributed the EE410 Labs to NCSU's educational PDK development effort (PDF copy of acknowledgement)
Lectures (PDF files)
Lectures 1-4: Hierarchies, boolean logic, transistors as switches, transistor structure, inverter parasitics, basic layout
Lectures 5-9: Layout, review, more layout/simulation/latchup, design margins, IC industry
Lectures 10-14: Analog design, sequential logic, review, classic designs
Lectures 15-19: Low power design, packaging/MEMS, classic designs, more classic designs, review
Lectures 20-25:DRAM/SRAM/Memory, Design verification, design flow, sample design front-to-back, transistor operation, sample design front-to-back, transistor operation, static timing analysis
Lectures 26-30:Clock skew, self-timed circuits, testability, review