International Journals

  1. Nuray At, Jean-Luc Beuchat, Eiji Okamoto, Ismail San, and Teppei Yamazaki. A Low-Area Unified Hardware Architecture for the AES and the Cryptographic Hash Function Grøstl. Journal of Parallel and Distributed Computing, 106:106–120, 2017. [DOI] [Preprint version]
  2. Mehran Mozaffari Kermani, Reza Azarderakhsh, Kui Ren, and Jean-Luc Beuchat. Guest Editorial: Introduction to the Special Section on Emerging Security Trends for Biomedical Computations, Devices, and Infrastructures. IEEE/ACM Transactions on Computational Biology and Bioinformatics, 13(3):399–400, 2016. [DOI]
  3. Nuray At, Jean-Luc Beuchat, Eiji Okamoto, Ismail San, and Teppei Yamazaki. Compact Hardware Implementations of ChaCha, BLAKE, Threefish, and Skein on FPGA. IEEE Transactions on Circuits and Systems I, 61(2):485-498, 2014. [DOI] [Preprint version]
  4. Jean-Luc Beuchat, Eiji Okamoto, and Teppei Yamazaki. A Low-Area Unified Hardware Architecture for the AES and the Cryptographic Hash Function ECHO. Journal of Cryptographic Engineering, 1(2):101-121, 2011. [DOI] [Preprint version]
  5. Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals, Eiji Okamoto, and Francisco Rodríguez-Henríquez. Fast Architectures for the ηT Pairing over Small-Characteristic Supersingular Elliptic Curves. In J. Bruguera, M. Cornea, and D. Das Sarma, editors, IEEE Transactions on Computers, Special Section on Computer Arithmetic, 60(2):266-281, 2011. [DOI] [Preprint version]
  6. Jean-Luc Beuchat, Hiroshi Doi, Kaoru Fujita, Atsuo Inomata, Piseth Ith, Akira Kanaoka, Masayoshi Katouno, Masahiro Mambo, Eiji Okamoto, Takeshi Okamoto, Takaaki Shiga, Masaaki Shirase, Ryuji Soga, Tsuyoshi Takagi, Ananda Vithanage, and Hiroyasu Yamamoto. FPGA and ASIC Implementations of the ηT Pairing in Characteristic Three. Computers and Electrical Engineering, 36(1):73-87, 2010. [DOI] [Preprint version]
  7. Jean-Luc Beuchat and Jean-Michel Muller. Automatic Generation of Modular Multipliers for FPGA Applications. IEEE Transactions on Computers, 57(12):1600-1613, 2008. [DOI] [pdf]
  8. Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto, Masaaki Shirase, and Tsuyoshi Takagi. Algorithms and Arithmetic Operators for Computing the ηT Pairing in Characteristic Three. In W. Geiselmann, Ç.K. Koç, and R. Steinwandt, editors, IEEE Transactions on Computers, Special Section on Special-Purpose Hardware for Cryptography and Cryptanalysis, 57(11):1454-1468, 2008. [DOI] [Preprint version]
  9. Jean-Luc Beuchat, Takanori Miyoshi, Jean-Michel Muller, and Eiji Okamoto. Horner's Rule-Based Multiplication over GF(p) and GF(pn): A Survey. International Journal of Electronics, 95(7):669-684, 2008. [DOI] [Preprint version]
  10. Jean-Luc Beuchat and Jean-Michel Muller. Modulo M Multiplication-Addition: Algorithms and FPGA Implementation. Electronics Letters, 40(11):654-655, 2004. [DOI]
  11. Jean-Luc Beuchat and Jacques-Olivier Haenni. Von Neumann's 29-state Cellular Automaton: A Hardware Implementation. IEEE Transactions on Education, 43(3):300-308, 2000. [DOI] [pdf]
  12. Eduardo Sanchez, Moshe Sipper, Jacques-Olivier Haenni, Jean-Luc Beuchat, André Stauffer, and Andrés Perez-Uribe. Static and Dynamic Configurable Systems. IEEE Transactions on Computers, 48(6):556-564, 1999. [DOI] [pdf]

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