Fawnizu Azmadi Hussin

Other details about Dr Fawnizu can also be found at his LinkedIn profile.
He is also actively involved in IEEE Malaysia Section for the last 9 years and currently serves as the Vice Chairman.
Current research activities at Universiti Teknologi Petronas are as follows:

Current Leadership Roles
  1. Director of Strategic Alliance at Universiti Teknologi Petronas.
  2. Vice Chairman of IEEE Malaysia Section (~3500 professional members).
  3. Past Chairman of IEEE Circuits & Systems Malaysia (~100 members); chairman for two years (2013 & 2014).

Graduate Research Projects (selected projects)
  1. Reliability of integrated circuits (Internal grant)
  2. Board-level IC testing and debugging (E-Science grant)
  3. Bio-inspired fault-tolerant NOC on-chip interconnect architecture (FRGS grant)
  4. Microfluidic testing (ERGS and PRGS grants)
  5. Embedded real-time image/video processing systems (Various grants including HICoE and internal grants)
Dr Fawnizu is interested in all aspects of VLSI design and testing, specifically in the following areas:
  1. Design-for-Test for System-on-Chip (SOC)
  2. Delay test of multi-voltage systems
  3. Low-power and area efficient scan DFT architecture
  4. SOC/NOC test scheduling algorithms
  5. Network-on-Chip (NOC) interconnect technology
  6. Low-power VLSI design targeting embedded applications
  7. Algorithm and architecture implementation and optimization on FPGAs
A list of Dr Fawnizu's paper publications can be found here and in UTP eprints.
Google scholar citations (here)

Dr Fawnizu also spends time on non-technical non-fiction writing. Check out his blog.