NYCU
CEreal and REliable SoC Laboratory
Welcome to Cerebral and Reliable SoC Laboratory (CERES Lab). Prof. Kun-Chih Chen is the PI and the lab location is at Engineering Building D Room 428, NYCU. CERES Lab aims to integrate interdisciplinary research and develop any key techniques for advanced VLSI systems, including AI accelerator design, reliable system design, smart manufacturing, etc. More details can be found in (Lab Overview). Sincerely welcome to join us!!
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Hot News!!!
Congratulation on the Honorable Mention Award of Mr. Chun-Chien Wang and Mr. Pin-Ching Shen in 2024 Taiwan IC Contest
Congratulation on the acceptance of Mr. Hao-Hsiang Peng and Mr. Pin-Ching Shen's IEEE SOCC'24 paper
Congratulation on the acceptance of Mr. Pavan Kumar MP, Mr. Zhe-Xiang Tu and Mr. Hsu-Chi Chen's IEEE Transactions on Instrumentation and Measurement (TIM) Journal Paper
Congratulation on the honor of Prof. Jimmy Chen being the invited speaker at IEEE A-SSCC'24 RiSE (Rising Star Express)
Congratulation on the honor of Prof. Jimmy Chen being the invited Tutorial Speaker at IEEE MWSCAS'24